• Journal of Power Electronics
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• 제12권5호
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• pp.739-747
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• 2012

This paper applies carrier phase shifted pulse-width modulation (CPS-PWM) to transformerless modular multilevel converters (MMC) to improve the output spectrum. Because the MMC topology is characterized by the double-star connection of six legs consisting of cascaded modular chopper cells with floating capacitors, the balance control of the DC-link capacitor voltage is essential for safe operation. This paper presents a leg-balancing control strategy to achieve DC-link voltage balance under all operating conditions. This strategy based on circulating current decoupling control focused on DC-link balancing between the upper and lower legs in each phase pair by considering the six legs as three independent phase-pairs. Experiments are implemented on a 100-V 3-kVA downscaled prototype. The experimental results show that the proposed leg-balancing control is both effective and practical.

• 전력전자학회논문지
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• 제23권6호
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• pp.403-407
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• 2018

This study proposes a predictive direct power control method in a modular multilevel converter (MMC) high-voltage direct-current (HVDC) system. The conventional proportional integral (PI)-based control method uses a cascaded connection and requires an optimal gain selection procedure and additional decoupling scheme. However, the proposed control method has a simple structure for active/reactive power control due to the direct power control scheme and exhibits a fast dynamic response by predicting the future status of system variables and considering time delay. The effectiveness of the proposed method is verified by simulation results.

• Journal of Power Electronics
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• 제17권1호
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• pp.115-126
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• 2017

This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.320-321
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• 2011

This paper proposes a practical design and development for CHBM inverter based on Power Electronics Building Blocks (PEBB). It is shown that the expansion and modularization characteristics of the CHBM inverter are improved since the individual inverter modules operate more independently, when using the PEBB concept. The proposed design and control methods are described in detail and the validity of the proposed system is verified experimentally in various industrial fields.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 추계학술대회 논문집
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• pp.9-10
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• 2016

최근 급속한 산업 발달로 인하여 기존의 수 MW급 대용량 인버터가 산업용 팬, 컴프레서, 고속 철도 시스템 등 여러 분야에 사용되면서 이와 관련된 대용량 인버터 연구가 활발히 진행 중이다. 이런 대용량 인버터는 고효율과 직병렬의 구성된 전력용반도체 소자를 동시다발적으로 제어되어야하기 때문에 멀티레벨 인버터의 구조가 가장 적합하다. Cascaded H-bridge 멀티레벨 인버터는 커패시터와 다이오드를 사용하지 않고 스위치만으로 구성하며, 필터를 따로 구성하지 않아도 정현파와 유사하게 전압을 출력할 수 있다. 이로 인해 고주파 감소 및 각 셀을 직렬로 연결하여 입력전압보다 높은 출력전압을 얻을 수 있다. 또한, 스위칭 방법에 따라 동일한 Cascaded H-bridge 멀티레벨인버터 토폴로지에서도 각 THD와 온도에 따른 손실이 달라질 수 있다. Cascaded H-bridge 멀티레벨 인버터에서 이용하는 스위칭 방식은 첫 번째로 유니폴라 방식을 기본으로 한 Phase-shift가 있다. 이는 180도 위상차를 갖는 2개의 레퍼런스 파형과 위상천이가 된 캐리어 파형의 비교로 PWM (Pulse Width Modulation) 을 수행한다. 두 번째 방식으로는 Level-shift가 있다. 이는 캐리어 파형을 IPD (In-Phase Disposition) 방식으로 수직적으로 대역폭이 연속적이게 나열하여 레퍼런스 파형과 비교하는 PWM방식이다. 본 논문에서는 Phase-shift와 Level-shift 방식에 따른 Cascaded H-bridge 인버터와 NPC (Neutral Point Clamped) 인버터를 결합한 토폴로지에서의 온도에 따른 손실을 분석하고, 시뮬레이션을 통하여 비교 분석하였다.

• 조명전기설비학회논문지
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• 제27권12호
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• pp.133-140
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• 2013

Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.240-249
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• 2018

Individual DC voltage balance problem is an inherent issue for cascaded H-bridge (CHB) based converter. When the CHB-based static synchronous compensator (STATCOM) is operating at zero current mode, the software-based individual DC voltage balancing control techniques may not work because of the infinitesimal output current. However, the different power losses of each cell would lead to the individual DC voltages unbalance. The uneven power losses on the local supplied cell-controllers (including the control circuit and drive circuit) would especially cause the divergence of individual DC voltages, due to their characteristic as constant power loads. To solve this problem, this paper proposes an adaptive voltage balancing module which is designed in the cell-controller board with small size and low cost circuits. It is controlled to make the power loss of the cell a constant resistance load, thus the DC voltages are balanced in zero current mode. Field test in a 10kV STATCOM confirms the performance of the proposed method.

• 전력전자학회논문지
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• 제8권6호
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• pp.488-495
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• 2003

최근에 높은 전력과 전압의 적용을 위한 방법으로써 PWM 방법보다는 스텝 펄스파를 이용해 출력 전압 레벨을 조합하는 멀티레벨 인버터가 폭 넓게 사용되어지고 있다. 이 방식은 도통각을 통해 한주기에 한번만 온, 오프 하기 때문에 스위칭 손실 측면에서 유리한 특성을 갖는다. 본 논문에서는 도통각을 얻는 간단한 방법을 제안하며 이 방법은 출력 전압 레벨에 의해 나누어진 기준 전압 파형의 전압-시간 면적들을 통해 인버터의 출력 스텝 펄스파를 구성한다. 또한 제안한 방법은 근사법에 의한 연립방정식의 해를 구할 필요가 없기 때문에 기존의 방법과는 달리 계산량을 줄일 수 있고 온 라인에 의해 도통각을 얻을 수 있는 장점이 있다.

• Journal of Power Electronics
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• 제17권4호
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• pp.933-941
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• 2017

In this paper an improved low frequency selective harmonic elimination-PWM (SHE-PWM) technique for Cascaded H-bridge (CHB) converters is proposed. The proposed method is able to eliminate low order harmonics from the output voltage of the converter for a wide range of modulation indices. To solve SHE-PWM equations, especially for low modulation indices, a modified method is used which employs either the positive or negative voltage polarities of H-bridge cells to increase the freedom degrees of each cell. Freedom degrees of the switching angles are also used to increase the range of available solutions for non-linear SHE equations. The proposed SHE methods can successfully eliminate up to $25^{th}$ harmonic from a 7-level output voltage by using just nine switching transitions or a 150 Hz switching frequency. To confirm the validity of the proposed method, simulation and experimental results have been presented.

• Journal of Power Electronics
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• 제15권5호
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• pp.1329-1337
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• 2015

By placing distributed generation power sources beside a big nonlinear load, these sources can be used as a power quality enhancer, while injecting some active power to the network. In this paper, a new scheme to use the distributed generation power source in both operation modes is presented. In this scheme, a fuzzy controller is added to adjust the optimal set point of inverter between compensating mode and maximum active power injection mode, which works based on the harmonic content of the nonlinear load. As the high order current harmonics can be easily rejected using passive filters, the DG is used to compensate the low order harmonics of the load current. Multilevel transformerless cascade inverters are preferred in such utilization, as they have more flexibility in current/voltage waveform. The proposed scheme is simulated in MATLAB/SIMULINK to evaluate the circuit performance. Then, a 1kw single phase prototype of the circuit is used for experimental evaluation of the paper. Both simulative and experimental results prove that such a circuit can inject a well-controlled current with desired harmonics and THD, while having a smaller switching frequency and better efficiency, related to previous 3-phase inverter schemes in the literature.