• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.1
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• pp.1-8
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• 2003

When solving the problems of electric power quality the converters with high Power factor are useful for the DC arc furnace power supply. In this paper, resonant converters of 50(60) Hz AC to DC arc described, where in each period of network voltage the capacitor and inductor of an oscillatory circuit are switched from series into parallel and vice versa parametrically. The duration of series and parallel connection and also the transformation ratio are dependent on load. Parallel oscillatory circuit restricts the short circuit current. These converters have high power factor from no-load to short-circuit and fit very well to supply are furnaces.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.590-594
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• 2004

In this study, lead-free piezoelectric ceramics were investigated for pressure sensor applications as a function of the amount of $CeO_2$ addition at Bi(Na,K)$TiO_3-SrTiO_3$ system. With increasing the amount of $CeO_2$ addition, the density and dielectric constant increased. Electromechanical coupling factor($k_p$) showed the maximum value(kp, 0.39) at 0.1wt% $CeO_2$ addition and decreased above 0.1wt% $CeO_2$ addition., Density, dielectric constant(${\varepsilon}_r$) increased but mechanical quality factor(Qm), piezoelectric constant(d33) decreased in $CeO_2$ addition, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.207-209
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• 2004

Currently, for satisfying the needs of scaled MOSFET's a high quality thin oxide dielectric is desired because the properties of conventional $SiO_2$ film are not acceptable for these very small sized transistors. As an alternative gate dielectric have drawn considerable alternation due to their superior performance and reliability properties over conventional $SiO_2$, to obtain the superior characteristics of ultra thin dielectric films, $N_2O$ grown thin oxynitride has been proposed as a dielectric growtuanneal ambient. In this study the authors observed process characteristics of $N_2O$ grown thin dielectric. In view points of the process characteristics of MOS capacitor, the sheet resistance of 4.07$[\Omega/sq.]$, the film stress of $1.009e^{10}[dyne/cm^2]$, the threshold voltage$(V_t)$ of 0.39[V], the breakdown voltage(BV[V]) of 11.45[V] was measured in PMOS. I could achieve improved electrical characteristics and reliability for deep submicron MOSFET devices with $N_2O$ thin oxide.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.202-202
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• 2008

The world gross market of many kinds of electronics, such as TV and mobile phone has been increasing rapidly these days. It is mainly caused by the amazing developments of IT technology during past decade and the changes of individual life style for the better. Thanks to the increases of electronics manufactured in quantity, much more electronic components such as MLCC (multi layer ceramic capacitor) and PCB (printed circuit board), which are our main products, have been needed as a consequence. Though it was reported that total market of electronic components exceeds several hundreds of billion dollars, there are many manufactures struggling for survival in the competition of electronics components. Then the recognition of quality as a key technology has spread and the efforts for high-yield production lines have been kept in many companies. In this paper, our efforts to eliminate the contamination of particles and the diffusion of some volatile organic compounds which is very harmful to workers at production line have been introduced.

• International journal of advanced smart convergence
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• v.9 no.1
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• pp.172-176
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• 2020

The implementation of a low phase noise voltage controlled oscillator (VCO) is important for the signal integrity of wireless communication terminal. A low phase noise wideband VCO for a wireless local area network (WLAN) application is presented in this paper. A 6-bit coarse tune capacitor bank (capbank) and a fine tune varactor are used in the VCO to cover the target band. The simulated oscillation frequency tuning range is from 8.6 to 11.6 GHz. The proposed VCO is desgned using 65 nm CMOS technology with a high quality (Q) factor bondwire inductor. The VCO is biased with 1.8 V VDD and shows 9.7 mA current consumption. The VCO exhibits a phase noise of -122.77 and -111.14 dBc/Hz at 1 MHz offset from 8.6 and 11.6 GHz carrier frequency, respectively. The calculated figure of merit(FOM) is -189 dBC/Hz at 1 MHz offset from 8.6 GHz carrier. The simulated results show that the proposed VCO performance satisfies the required specification of WLAN standard.

• Journal of Sensor Science and Technology
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• v.27 no.4
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• pp.269-274
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• 2018

High-sensitivity signal-to-noise ratio (SNR) microphones are essentially required for a broad range of automatic speech recognition applications. Piezoelectric microphones have several advantages compared to conventional capacitor microphones including high stiffness and high SNR. In this study, we designed a new piezoelectric membrane structure by using the finite elements method (FEM) and an optimization technique to improve the sensitivity of the transducer, which has a high-quality AlN piezoelectric thin film. The simulation demonstrated that the sensitivity critically depends on the inner radius of the top electrode, the outer radius of the membrane, and the thickness of the piezoelectric film in the microphone. The optimized piezoelectric transducer structure showed a much higher sensitivity than that of the conventional piezoelectric transducer structure. This study provides a visible path to realize micro-scale high-sensitivity piezoelectric microphones that have a simple manufacturing process, wide range of frequency and low DC bias voltage.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1725-1734
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• 2016

This paper presents a novel seven-level (7L) voltage source converter for high-power medium-voltage applications. The proposed topology is an H-bridge connection of two nested neutral-point clamped (NNPC) converters and is referred to as an HNNPC converter. This converter exhibits advantageous features, such as operating over a wide range of output voltages, particularly for 10-15 kV applications, without the need to connect power semiconductors in series; high-quality output voltage; and fewer components relative to other classic seven-level topologies. A novel sinusoidal pulse width modulation technique is also developed for the proposed 7L-HNNPC converter to control flying capacitor voltages. One of the main features of the control strategy is the independent application of control to each arm of the converter to significantly reduce the complexity of the controller. The performance of the proposed converter is studied under different operating conditions via MATLAB/Simulink simulation, and its feasibility is evaluated experimentally on a scaled-down prototype converter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.1
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• pp.66-74
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• 2000

The structural and electrical characteristics of SBT thin films, fabricated on Pt/Ti/SiO\ulcorner/Si substrates by a pulsed laser deposition(PLD), were investigated to develop ferroelectric thin films for capacitor lay-ers of FRAM. EFfects of target composition on the characteristics of SBT thin films were examined. Target were prepared by mixed oxide method, and composition of Sr/Bi/Ta on SBT was changed to 1/2/2, 1/2.4/2, 1/2.8/2, 0.8/2/2 and 1.2/2/2. SBt thin films were fabricated, as a function of substrate temperature and oxygen pressure, by PLD. The optimized ocndition, to fabricate high quality SBT thin films, was 700 $^{\circ}C$ of substrate temperature, 200 mTorr of oxygen pressure, and 2 J/$\textrm{cm}^2$ of laser energy density. Maximum remnant value(2Pr) of 9.0 $\mu$C/$\textrm{cm}^2$, coercive field value(Ec) of 50 kV/cm, dielectric constant value of 166, and leakage current densities of <10\ulcorner A/$\textrm{cm}^2$ were observed for the films with 1/2/2 composition, which was prepared at the above PLD condition.

• Proceedings of the IEEK Conference
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• summer
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• pp.343-347
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• 2004

High oxidation temperature of SiC shows a tendency of carbide formation at the interface which results in poor MOSFET transfer characteristics. Thus we developed oxidation processes in order to get low interface charge densities. N-type 6H-SiC MOS capacitors were fabricated by different oxidation processes: dry, wet, and dry­reoxidation. Gate oxidation and Ar anneal temperature was $1150^{\circ}C.$ Ar annealing was performed after gate oxidation for 30 minutes. Dry-reoxidation condition was $950^{\circ}C,$ H2O ambient for 2 hours. Gate oxide thickness of dry, wet and dry-reoxidation samples were 38.0 nm, 38.7 nm, 38.5 nm, respectively. Mo was adopted for gate electrode. To investigate quality of these gate oxide films, high frequency C- V measurement, gate oxide leakage current, and interface trapped charge densities (Dit) were measured. The interface trapped charge densities (Dit) measured by conductance method was about $4\times10^{10}[cm^{-1}eV^{-1}]$ for dry and wet oxidation, the lowest ever reported, and $1\times10^{11}[cm^{-1}eV^{-1}]$ for dry-reoxidation

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.83-87
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• 2004

Phase noise performance and current consumption of Radio Frequency (RF) Voltage-Controlled Oscillator (VCO) are largely dependent on the Quality (Q) factor of inductor-capacitor (LC) tank. Because the Q-factor of LC tank is determined by on-chip spiral inductor, we designed, analyzed, and modeled on-chip differential inductor to enhance differential Q-factor, reduce current consumption and save silicon area. The simulated inductance is 3.3 nH and Q-factor is 15 at 2 GHz. Self-resonance frequency is as high as 13 GHz. To verify its use to RF applications, we designed 2 GHz differential LC VCO. The measurement result of phase noise is -112 dBc/Hz at an offset frequency of 100 kHz from a 2GHz carrier frequency. Tuning range is about 500 MHz (25%), and current consumption varies from 5mA to 8.4 mA using bias control technique. Implemented in $0.35-{\mu}m$ SiGe BiCMOS technology, the VCO occupies $400\;um{\times}800\;um$ of silicon area.