• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.11-21
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• 1997

The delay models for CMOS invertr presented so far predicted the delay time quite accurately whens input transition-time is very small. But the problem that the accuracy is inclined to decrease becomes apparent as input transition tiem increases. In this paper, a delay model for CMOS inverter is presented, which accuractely predicts the delay time even though input transition-time increases. To inverter must be included in modeling process because the main reason of inaccuracy as input transition tiem is the leakage current through the complementary MOS. For efficient modeling, this paper first models the MOSes with simple I-V charcteristic, with which both the pMOS and the nMOS are considered easily in calculating the inverter delay times. This resulting model needs few parameters and re-models each MOS effectively and simply evaluates output voltage to predict delay time, delay values obtained from this effectively and simply evaluates output voltage to predict delay time, delay values obtained from this model have been found to be within about 5% error rate of the SPICE results. The calculation time to predict the delay time with the model from this paper has the speed of more than 70times as fast as to the SPICE.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.3-3
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• 2000

Limit cycle analysis of attitude control system using gas jet thrusters is performed. Schmitt-Trigger and PD control laws are applied and solenoid valve time delay is considered. Phase plane method is used for calculation of characteristics of limit cycle. Important characteristics of resultant limit cycle such as frequency, amplitude, maximum rate, and duty ratio could be expressed analytically by proposed method.

• Proceedings of the Korean Institute Of Construction Engineering and Management
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• autumn
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• pp.426-429
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• 2003

In the construction process, there are many change orders differing to the initial contracts came from the social needs and environmental changes. Most of them will impact to the construction process so that its effects occur project delays. Time extension and liquidated damage in the construction process come from schedule delay whether it is excusable or not non-excusable by the owner. However, those become the delay claims if the owner and the contractor are not agreed on this situation. One of the most important thing on the delay claims is the calculation of delay. The purpose of this study is to present the method of the time delay calculation by comparison of As-Planned schedule, As-Built schedule including all delay and As-Built schedule absent owner delay.

• International Journal of Aeronautical and Space Sciences
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• v.5 no.1
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• pp.94-100
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• 2004

Ionospheric time delay is the biggest error source for single-frequency DGPSapplications, including time transfer and Wide Area Differential GPS (WADGPS).Currently, there are many attempts to develop real-time ionospheric time delayestimation techniques to reduce positioning error due to the ionospheric time delay.Klobuchar model is now widely used for ionosphehc time delay calculation forsingle-frequency users. It uses flat surface at night time and cosine surface atdaytime[1], However, the model was developed for worldwide ionosphere fit, it isnot adequate for local area single-frequency users who want to estimateionospheric time delay accurate1y[2]. Therefore, 3-D ionosphere model usingtomographic estimation has been developed. 3-D tomographic inversion modelshows better accuracy compared with prior a1gorithms[3]. But that existing 3-Dmodel still has problem that it requires many coefficients and measurements forgood accuracy. So, that algorithm has Umitation with many coefficients incontinuous estimation at the small region which is obliged to have fewermeasurements.In this paper, we developed an modified 3-D ionosphehc time delay modelusing tomography, which requires only fewer coefficients. Because the combinationsof our base coefficients correspond to the full coefficients of the existing model, ourmodel has equivalent accuracy to the existing. We confirmed our algorithm bysimulations. The results proved that our modified algohthm can perform continuousestimation with fewer coefficients.

• The Journal of the Acoustical Society of Korea
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• v.24 no.2E
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• pp.38-45
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• 2005

The noise reduction of the In-The-Ear (ITE) hearing aid (HA) can be achieved by arrays of microphones. Each of the right and the left ears was assumed to have two HA microphones. These arrays of HA microphones produce particular patterns of directivity by some time delay between two microphones. The directivity pattern geometrically increase the S/N ratio. The boundary element method (BEM) was used for the three dimensional simulation of the HA directivity pattern with the two pairs' microphone arrays. The separation between two microphones was fixed to 10 mm. The time delay between the two microphones was calculated to produce the most narrow directivity pattern in the fore front of the head. The variation of the time delay was examined in accordance with input frequencies. This numerical analysis may be then applied for the calculation of the time delay parameter of the digital hearing aid DSP chip.

• Journal of Drive and Control
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• v.15 no.3
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• pp.1-7
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• 2018

Humanoid robots have fascinated many researchers since they appeared decades ago. For the requirement of both accurate tracking control and the safety of physical human-robot interaction, torque control is basically desirable for humanoid robots. Humanoid robots are highly nonlinear, coupled, complex systems, accordingly the calculation of robot model is difficult and even impossible if precise model of the humanoid robots are unknown. Therefore, it is difficult to control using traditional model-based techniques. To realize model-free torque control, time-delay control (TDC) for humanoid robot was proposed with time-delay estimation technique. Using optimal walking trajectory obtained by particle swarm optimization, TDC with proposed scheme is implemented on whole body of a humanoid, not on biped legs even though it is performed by a virtual humanoid robot. The simulation results show the validity of the proposed TDC for humanoid robots.

• Journal of the Korean Society of Industry Convergence
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• v.27 no.4_2
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• pp.935-942
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• 2024

This study analyzes the effects of the parasitic capacitance of the SiC MOSFET used in the Dual Active Bridge ( DAB) converter and proposes a method for calculating the leakage inductance of the transformer. The DAB converter employs high-frequency switching to achieve high efficiency, high power density, and reliability. MOSFETs possess parasitic capacitance, which induces resonance with the leakage inductance of the transformer during switching operations, resulting in a voltage change delay. This paper discusses the effect of the delay of voltage changes on the DAB converter output and proposes a method to calculate the delay time. This method aims to equalize the delay time to minimize this effect and enhance the accuracy of the leakage inductance calculation of the transformer. The proposed method is validated through experiments and simulations.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.101-105
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• 1997

This paper presents the worst-case time-delay in CAN(Controller Area Network) system through the mathematical model. Time-delay in the CAN system is devided into a generation delay, a transmission delay and a delivery delay. This paper also measures the performance represented in terms of the number of station, transmission speed, data size etc. by using the computer simulation.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.4
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• pp.106-115
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• 1994

This paper presents the design of a technology mapping system for optimizing delays of combinational and synchronous sequential logic circuits. The proposed system performs delay optimization for combinational logic circuits by remapping, buffering, and gate merging methods through the correct delay calculation in which the loading values are considered. To get time optimized synchronous sequential circuits, heuristic algorithms are proposed. The proposed algorithms reallocate registers by considering the critical path characteristics. Experimental results show that the proposed system produces a more optimized technology mapping for MCNC benchmarks compared with mis-II.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1571-1576
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• 2005

DCS has many processing components and various communication elements. And its communication delay characteristic is affected diverse operating situation and context. Especially, binding signal which traversed from one control-node to another control-node undergo all sort of delay conditions. So its delay value has large deviation with the lapse of time, and the measurement of delay statistics during long time is very difficult by using general oscilloscope or other normal instruments. This thesis introduces the design and implementation of PC-based BDAS(Binding Delay Analysis System) System developed to overcomes these hardships. The system has signal-generator, IO-card, data-acquisition module, delay-calculation and analyzer module, those are implemented on industrial standard PC/Ethernet hardware and Windows/Linux platforms. This system can detect accurate whole-system-wide delay time including io, control processing and network delay, in the resolution of msec unit, and can analyze each channel's delay-historic data which is maintained by realtime database. So, this system has strong points of open system architecture, for example, user-friendly environment, low cost, high compatibility, simplicity of maintenance and high extension ability. Of all things, the measuring capability of long-time delay-statistics obtained through historic-DB make the system more valuable and useful, which function is essential to analyze accurate delay performance of DCS system. Using this system, the verification of delay performance of DCS for nuclear power plants is succeeded in KNICS(Korea Nuclear Instrumentation & Control System) projects