• Title/Summary/Keyword: CVD(chemical vapor deposition)

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Electrochemical Characterization of Anti-Corrosion Film Coated Metal Conditioner Surfaces for Tungsten CMP Applications (텅스텐 화학적-기계적 연마 공정에서 부식방지막이 증착된 금속 컨디셔너 표면의 전기화학적 특성평가)

  • Cho, Byoung-Jun;Kwon, Tae-Young;Kim, Hyuk-Min;Venkatesh, Prasanna;Park, Moon-Seok;Park, Jin-Goo
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.1
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    • pp.61-66
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    • 2012
  • Chemical Mechanical Planarization (CMP) is a polishing process used in the microelectronic fabrication industries to achieve a globally planar wafer surface for the manufacturing of integrated circuits. Pad conditioning plays an important role in the CMP process to maintain a material removal rate (MRR) and its uniformity. For metal CMP process, highly acidic slurry containing strong oxidizer is being used. It would affect the conditioner surface which normally made of metal such as Nickel and its alloy. If conditioner surface is corroded, diamonds on the conditioner surface would be fallen out from the surface. Because of this phenomenon, not only life time of conditioners is decreased, but also more scratches are generated. To protect the conditioners from corrosion, thin organic film deposition on the metal surface is suggested without requiring current conditioner manufacturing process. To prepare the anti-corrosion film on metal conditioner surface, vapor SAM (self-assembled monolayer) and FC (Fluorocarbon) -CVD (SRN-504, Sorona, Korea) films were prepared on both nickel and nickel alloy surfaces. Vapor SAM method was used for SAM deposition using both Dodecanethiol (DT) and Perfluoroctyltrichloro silane (FOTS). FC films were prepared in different thickness of 10 nm, 50 nm and 100 nm on conditioner surfaces. Electrochemical analysis such as potentiodynamic polarization and impedance, and contact angle measurements were carried out to evaluate the coating characteristics. Impedance data was analyzed by an electrical equivalent circuit model. The observed contact angle is higher than 90o after thin film deposition, which confirms that the coatings deposited on the surfaces are densely packed. The results of potentiodynamic polarization and the impedance show that modified surfaces have better performance than bare metal surfaces which could be applied to increase the life time and reliability of conditioner during W CMP.

대기압 유전체 배리어 방전을 이용한 폴리머 박막의 증착과 특성 분석에 대한 연구

  • Kim, Gi-Taek;Suzaki, Yoshifumi;Kim, Yun-Gi
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.10a
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    • pp.38.2-38.2
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    • 2011
  • 폴리머 박막은 그 고유한 특성으로 인해 여러 산업적으로 널리 사용되고 있는 재료이다 예로 의약품이나 식품 포장지의 배리어, 전자부품의 절연체, 반도체 공정에서의 사용, 혹은 부식방지를 위해 사용 되어지기도 한다. 이 폴리머 박막을 증착 하기 위한 방법으로 이전부터 CVD (Chemical Vapor Deposition) 방법이 많이 사용되었고 지금까지도 가장 많이 사용되는 방법이다. CVD를 사용하여 $SiO_2$-like 필름의 증착은 전구체(precursor)로 Silane ($SiH_4$)을 사용하였으며, 플라즈마 발생 소스(source)로 열 혹은 전기장 등을 사용 하며 공정 시 압력 또한 대부분 저압 하에서 실시 하였다. 이와 같은 이전 CVD 방법의 문제는 사용되는 Silane 자체가 인체에 해로울 정도로 독성이 있으며 폭발성도 같이 가지고 있어 작업환경의 위험성이 높으며 열을 사용한 CVD의 경우 높은 공정 온도로 인해 증착 할 수 있는 대상이 제한 되어 지며 높은 열의 발생을 위해 많은 에너지의 소비가 필요하다. 저압 플라즈마를 사용한 CVD 는 공정상 높은 열의 발생이 일어나지 않아 기판 운용상 문제가 되지 않지만 저압 환경에서 해당 공정이 이루어기 때문에 인해 필수적으로 고가의 진공 챔버가 필수적이며 저압을 유지할 고가의 진공 펌프나 추가 장비들이 필요하게 된다, 또한 챔버 내에서 이루어지는 공정으로 인해 공정의 연속성이 떨어져 시잔비용 또한 많이 잡아 먹는다. 이러한 열 혹은 저압 플라즈마등을 사용한 공정의 단점을 해결하기 위해 여러 연구자들이 다양한 방법을 통해 연구를 하였다. 대기압 유전체 배리어 방전(AP-DBD: Atmospheric Pressure-Dielectric Barrier Discharge)을 사용한 폴리머 박막의 증착은 이전 전통적인 방법에 비해 낮은 장비 가격과 낮은 공정 온도 그리고 연속적인 공정 등의 장점이 있는 폴리머 박막 증착 방법 이다. 대기압 유전체 배리어 방전 공정 변수로 공급 전압 및 주파수 그리고 공급 전압의 영향, 전구체를 유전체 배리어 방전 전극으로 이동 시키기 위해 사용된 캐리어 가스의 종류 및 유량, 화학양론적 계수를 맞추기 위해 같이 포함되는 산소 가스의 유량, DBD 전극의 형태에 따른 증착 박막의 균일성 등 이 존재하며 이런 많은 변수 들에 대한 연구가 진행 되었지만 아직 이 대기압 DBD를 이용한 폴리머 박막의 증착에 대한 명확한 이해는 아직 완전 하다 할 수 없다. 본 연구에서는 이러한 대기압 DBD를 이용하여 폴리머 박막의 증착시 영향을 미치는 많은 공정 변수 등이 박막생성에 미치는 영향과 증착된 박막의 성질에 대한 연구를 진행 하였다.

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PEMOCVD of Ti(C,N) Thin Films on D2 Steel and Si(100) Substrates at Low Growth Temperatures

  • Kim, Myung-Chan;Heo, Cheol-Ho;Boo, Jin-Hyo;Cho,Yong-Ki;Han, Jeon-Geon
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.211-211
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    • 1999
  • Titanium nitride (TiN) thin films have useful properties including high hardness, good electrical conductivity, high melting point, and chemical inertness. The applications have included wear-resistant hard coatings on machine tools and bearings, decorative coating making use of the golden color, thermal control coatings for widows, and erosion resistant coatings for spacecraft plasma probes. For all these applications as feature sizes shrink and aspect ratios grow, the issue of good step coverage becomes increasingly important. It is therefore essential to manufacture conformal coatings of TiN. The growth of TiN thin films by chemical vapor deposition (CVD) is of great interest for achieving conformal deposition. The most widely used precursor for TiN is TiCl4 and NH3. However, chlorine impurity in the as-grown films and relatively high deposition temperature (>$600^{\circ}C$) are considered major drawbacks from actual device fabrication. To overcome these problems, recently, MOCVD processes including plasma assisted have been suggested. In this study, therefore, we have doposited Ti(C, N) thin films on Si(100) and D2 steel substrates in the temperature range of 150-30$0^{\circ}C$ using tetrakis diethylamido titanium (TDEAT) and titanium isopropoxide (TIP) by pulsed DC plamsa enhanced metal-organic chemical vapor deposition (PEMOCVD) method. Polycrystalline Ti(C, N) thin films were successfully grown on either D2 steel or Si(100) surfaces at temperature as low as 15$0^{\circ}C$. Compositions of the as-grown films were determined with XPS and RBS. From XPS analysis, thin films of Ti(C, N) with low oxygen concentration were obtained. RBS data were also confirmed the changes of stoichiometry and microhardness of our films. Radical formation and ionization behaviors in plasma are analyzed by optical emission spectroscopy (OES) at various pulsed bias and gases conditions. H2 and He+H2 gases are used as carrier gases to compare plasma parameter and the effect of N2 and NH3 gases as reactive gas is also evaluated in reduction of C content of the films. In this study, we fond that He and H2 mixture gas is very effective in enhancing ionization of radicals, especially N resulting is high hardness. The higher hardness of film is obtained to be ca. 1700 HK 0.01 but it depends on gas species and bias voltage. The proper process is evident for H and N2 gas atmosphere and bias voltage of 600V. However, NH3 gas highly reduces formation of CN radical, thereby decreasing C content of Ti(C, N) thin films in a great deal. Compared to PVD TiN films, the Ti(C, N) film grown by PEMOCVD has very good conformability; the step coverage exceeds 85% with an aspect ratio of more than 3.

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Fabrication of CVD SiC Double Layer Structure from the Microstructural Change Through Input Gas Ratio (입력기체비를 이용한 미세구조 변화로부터 화학증착 탄화규소의 복층구조 제작)

  • 오정환;왕채현;최두진;송휴섭
    • Journal of the Korean Ceramic Society
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    • v.36 no.9
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    • pp.937-945
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    • 1999
  • In an effort to protect a RBSC(reaction -bonded SiC) tube SiC films from methyltrichlorosilane(MTS) by low pressure chemical vapor deposition were deposited in hydrogen atmosphere on the RBSC(reaction-bonded SiC) substrates over a range of input gas ratio(${\alpha}=P_{H2}/P_{MTS}=Q_{H2}/Q_{MTS}$=1 to 10) and deposition temperatures(T=1050~1300$^{\circ}C$). At the temper-ature of 1250$^{\circ}C$ the growth rate of SiC films increased and then decreased with decreasing the input gas ratio. The microstructure of SiC films was changed from granular type structure exhibiting (111) preferred orientation in the high input gas ratios to faceted columnar grain structure showing (220) in the low input gas ratios. The similar microstructure change was obtained by increasing the deposition temperature. These results were closely related to a change of deposition mechanism. Double layer structure having granular type and faceted ciolumnar grain structure from the manipulation of mechanism. Double layer structure having granular type and faceted columnar grain structure from the manipulation of the input gas ratio without changing the deposition temperatue was successfully fabricated through in -site process.

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Deposition of Plasma Polymerized Films on Silicon Substrates Using Plasma Assisted CVD Method For Low Dielectric Application

  • Kim, M.C.;S.H. Cho;J.H. Boo;Lee, S.B.;J.G. Han;B.Y. Hong;S.H. Yang
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2001.06a
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    • pp.72-72
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    • 2001
  • Plasma polymerized thin films have been deposited on Si(lOO) substrates at $25-400^{\circ}C$ using thiophene ($C_4H_4S$) precursor by plasma assisted chemical vapor deposition (PACVD) method for low-dielectric device application. In order to compare physical properties of the as-grown thin films, the effects of the plasma power, gas flow ratio and deposition temperature on the dielectric constant and thermal stability were mainly studied. XRD and TED studies revealed that the as-grown thin films have highly oriented amorphous polymer structure. XPS data showed that the polymerized thin films that grown under different RF power and deposition temperature as well as different gas ratio of $Ar:H_2$ have different stoichiometric ratio of C and S compared with that of monomer, indicating a formation of mixture polymers. Moreover, we also realized that oxygen free and thermally stable polymer thin films could be grown at even $400^{\circ}C$. The results of SEM, AFM and TEM showed that the polymer films with smooth surface and sharp interface could be grown under various deposition conditions. From the electrical property measurements such as I-V and C-V characteristics, the minimum dielectric constant and the best leakage current were obtained to be about 3.22 and $10-11{\;}A/\textrm{cm}^2$, respectively.

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A Review on Ultrathin Ceramic-Coated Separators for Lithium Secondary Batteries using Deposition Processes (증착 기법을 이용한 리튬이차전지용 초박막 세라믹 코팅 분리막 기술)

  • Kim, Ucheol;Roh, Youngjoon;Choi, Seungyeop;Dzakpasu, Cyril Bubu;Lee, Yong Min
    • Journal of the Korean Electrochemical Society
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    • v.25 no.4
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    • pp.134-153
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    • 2022
  • Regardless of a trade-off relationship between energy density and safety, it is essential to improve both properties for future lithium secondary batteries. Especially, to improve the energy density of batteries further, not only thickness but also weight of separators including ceramic coating layers should be reduced continuously apart from the development of high-capacity electrode active materials. For this purpose, an attempt to replace conventional slurry coating methods with a deposition one has attracted much attention for securing comparable thermal stability while minimizing the thickness and weight of ceramic coating layer in the separator. This review introduces state-of-the-art technology on ceramic-coated separators (CCSs) manufactured by the deposition method. There are three representative processes to form a ceramic coating layer as follows: chemical vapor deposition (CVD), atomic layer deposition (ALD), and physical vapor deposition (PVD). Herein, we summarized the principle and advantages/disadvantages of each deposition method. Furthermore, each CCS was analyzed and compared in terms of its mechanical and thermal properties, air permeability, ionic conductivity, and electrochemical performance.

Hydrogen Fluoride Vapor Etching of SiO2 Sacrificial Layer with Single Etch Hole (단일 식각 홀을 갖는 SiO2 희생층의 불화수소 증기 식각)

  • Chayeong Kim;Eunsik Noh;Kumjae Shin;Wonkyu Moon
    • Journal of Sensor Science and Technology
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    • v.32 no.5
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    • pp.328-333
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    • 2023
  • This study experimentally verified the etch rate of the SiO2 sacrificial layer etching process with a single etch hole using vapor-phase hydrogen fluoride (VHF) etching. To fabricate small-sized polysilicon etch holes, both circular and triangular pattern masks were employed. Etch holes were fabricated in the polysilicon thin film on the SiO2 sacrificial layer, and VHF etching was performed to release the polysilicon thin film. The lateral etch rate was measured for varying etch hole sizes and sacrificial layer thicknesses. Based on the measured results, we obtained an approximate equation for the etch rate as a function of the etch hole size and sacrificial layer thickness. The etch rates obtained in this study can be utilized to minimize structural damage caused by incomplete or excessive etching in sacrificial layer processes. In addition, the results of this study provide insights for optimizing sacrificial layer etching and properly designing the size and spacing of the etch holes. In the future, further research will be conducted to explore the formation of structures using chemical vapor deposition (CVD) processes to simultaneously seal etch hole and prevent adhesion owing to polysilicon film vibration.

HFCVD법을 이용한 대면적 BDD(Boron Doped Diamond) 전극 개발

  • An, Na-Yeong;Park, Cheol-Uk;Lee, Jeong-Hui;Lee, Yu-Gi;Choe, Yong-Seon;Lee, Yeong-Gi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.168-168
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    • 2016
  • BDD(Boron Doped Diamond) 전극은 전위창이 넓고, 다른 불용성 전극에 비해 산소발생과전압이 높아 물을 전기화학적인 방법으로 처리하는 영역에 있어 매우 효과적일 뿐만 아니라, 전통적인 불용성 전극에 비해 전극 표면에서 수산화 라디칼(-OH)과 오존(O3)의 발생량이 월등히 높아 수처리용 전극으로서의 유용성이 매우 높다. 따라서 BDD 전극을 수처리용 전극에 사용하는 경우 수산화 라디칼(-OH)과 오존(O3), 과산화수소(H2O2) 등과 같은 산화제의 생성은 물론이고, 염소(Cl2)가 포함되어 있는 전해액에서는 차아염소산(HOCl)이나 차아염소산이온(OCl-)과 같은 강력한 산화제가 발생되어 전기화학적 폐수처리, 전기화학적 정수처리, 선박평형수 처리 등의 분야에 널리 활용될 수 있다. 본 연구에서는 상온 및 상압에서 운전이 가능하고 난분해성 오염물질 제거 효과가 뛰어난 전기화학적 고도산화공정(Electrochemical Advanced Oxidation Process, EAOP)에 적합한 대면적의 BDD 전극을 개발하고 자 하였다. 이러한 BDD 전극의 성막 방법으로는 필라멘트 가열 CVD, 마이크로파 플라즈마 CVD, DC 플라즈마 CVD 등이 널리 알려져 있는데 최근에는 설비의 투자비가 비교적 저렴하고, 대면적의 기판처리가 용의한 필라멘트 가열 화학기상증착법(Hot Filament Chemical Vapor Deposition, HFCVD)이 상업적으로 각광을 받고 있다. 따라서 본 연구에서는 HFCVD 방법을 이용하여 반응 가스의 투입비율, BDD 박막의 두께, 기판의 재질 등에 따른 여러 가지 성막 조건들을 검토하여 $100{\times}100mm$ 이상의 대면적 BDD 전극을 개발하였다. Fig. 1은 본 연구를 통하여 얻어진 BDD 전극의 표면 및 단면 SEM이다.

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Fabrication of Graphene Field-effect Transistors with Uniform Dirac Voltage Close to Zero (균일하고 0 V에 가까운 Dirac 전압을 갖는 그래핀 전계효과 트랜지스터 제작 공정)

  • Park, Honghwi;Choi, Muhan;Park, Hongsik
    • Journal of Sensor Science and Technology
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    • v.27 no.3
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    • pp.204-208
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    • 2018
  • Monolayer graphene grown via chemical vapor deposition (CVD) is recognized as a promising material for sensor applications owing to its extremely large surface-to-volume ratio and outstanding electrical properties, as well as the fact that it can be easily transferred onto arbitrary substrates on a large-scale. However, the Dirac voltage of CVD-graphene devices fabricated with transferred graphene layers typically exhibit positive shifts arising from transfer and photolithography residues on the graphene surface. Furthermore, the Dirac voltage is dependent on the channel lengths because of the effect of metal-graphene contacts. Thus, large and nonuniform Dirac voltage of the transferred graphene is a critical issue in the fabrication of graphene-based sensor devices. In this work, we propose a fabrication process for graphene field-effect transistors with Dirac voltages close to zero. A vacuum annealing process at $300^{\circ}C$ was performed to eliminate the positive shift and channel-length-dependence of the Dirac voltage. In addition, the annealing process improved the carrier mobility of electrons and holes significantly by removing the residues on the graphene layer and reducing the effect of metal-graphene contacts. Uniform and close to zero Dirac voltage is crucial for the uniformity and low-power/voltage operation for sensor applications. Thus, the current study is expected to contribute significantly to the development of graphene-based practical sensor devices.

Graphene Transistor Modeling Using MOS Model (MOS 모델을 이용한 그래핀 트랜지스터 모델링)

  • Lim, Eun-Jae;Kim, Hyeongkeun;Yang, Woo Seok;Yoo, Chan-Sei
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.9
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    • pp.837-840
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    • 2015
  • Graphene is a single layer of carbon material which shows very high electron mobility, so many kinds of research on the devices using graphene layer have been performed so far. Graphene material is adequate for high frequency and fast operation devices due to its higher mobility. In this research, the actual graphene layer is evaluated using RT-CVD method which can be available for mass production. The mobility of $7,800cm^2/Vs$ was extracted, that is more than 7 times of that in silicon substrate. The graphene transistor model having no band gap is evaluated using both of pMOS and nMOS based on the measured mobility values. And then the response of graphene transistor model regarding to gate length and width is examined.