• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.3
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• pp.15-20
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• 2012

This paper presents a 5-Gb/s optical receiver circuit realized in a $0.13-{\mu}m$ CMOS technologies for the applications of high-speed digital interface. Exploiting modified RGC input stage at the front-end transimpedance amplifier, interleaving active feedback and source degeneration techniques at the limiting amplifier, the proposed optical receiver chip demonstrates the measured results of $72-dB{\Omega}$ transimpedance gain, 4.7-GHz bandwidth, and $400-mV_{pp}$differential output voltage swings up to the data rate of 5-Gb/s. Also, the chip dissipates 66mW in total from a single 1.2-V supply, and occupies the area of $1.6{\times}0.8mm^2$.

• 한국정보통신설비학회:학술대회논문집
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• 2005.08a
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• pp.154-158
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• 2005

In this paper, we design optical receiver composed of CDR(clock and data recovery), SA(sense amp), TIA(transimpe dence amplifier), and decision circuit. The optical receiver can be classified to two main block, one is Deserializer composed of CDR and SA, another is PD receiver composed of preamplifier(샴), peak detector, etc. In this paper, we propose CDR using delayed data topology that could improve defects of existing CDR. The optical receiver that is proposed in this paper has the role of translation a 1.25 Gb/s optical signal to $10{\times}125 Mb/s$ array electric signals. This optical receiver is verified by simulator(hspice) using 0.35 um CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.7 s.349
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• pp.13-19
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• 2006

A 5Gb/s cross coupled transimpedance amplifier (TIA) & limiting amp(LA), regulated cascode(RGC) is realized in a 0.18$\mu$m CMOS technology for optical printed circuit board applications. The optical receiver demonstrates $92.8db{\Omega}$ transimpedance and limiting amplifier gain, 5Gb/s bandwidth for 0.5pF photodiode capacitance, and 9.74mW power dissipation from 1.8V, 2.4V supply. Input stage impedance is $50{\Omega}$. The circuit was implemented on an optical PCB, and the 5Gb/s data output signal was measured with a good data eye opening.

• Proceedings of the Optical Society of Korea Conference
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• 2001.02a
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• pp.180-181
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• 2001

이 논문은 채널당 1Gbps로 동작하는 10채널 광 수신기를 0.25$mu extrm{m}$ CMOS공정을 이용하여 설계한 것이다. 광 수신기는 크게 2부분으로 나눠지는데 첫 번째 부분은 입력된 전류 신호를 전압 신호로 변환시켜주는 역할을 하는 트랜스임피던스 전치증폭기이고, 다음 부분은 원하는 디지털 레벨로 풀스윙 할 수 있도록 하는 후치증폭기이다. 전치증폭기의 출력 전압은 스윙폭에 무관하게 그 다음 단에서 적당한 디지털 레벨 데이터로 변환되어야한다. (중략)

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.22-26
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• 2012

This paper introduces a 2.5-Gb/s optical receiver implemented in a standard 1P4M 0.18um CMOS technology for the applications of active optical HDMI cables. The optical receiver consists of a differential transimpedance amplifier(TIA), a five-stage differential limiting amplifier(LA), and an output buffer. The TIA exploits the inverter input configuration with a resistive feedback for low noise and power consumption. It is cascaded by an additional differential amplifier and a DC-balanced buffer to facilitate the following LA design. The LA consists of five gain cells, an output buffer, and an offset cancellation circuit. The proposed optical receiver demonstrates $91dB{\Omega}$ transimpedance gain, 1.55 GHz bandwidth even with the large photodiode capacitance of 320 fF, 16 pA/sqrt(Hz) average noise current spectral density within the bandwidth (corresponding to the optical sensitivity of -21.6 dBm for $10^{-12}$ BER), and 40 mW power dissipation from a single 1.8-V supply. Test chips occupy the area of $1.35{\times}2.46mm^2$ including pads. The optically measured eye-diagrams confirms wide and clear eye-openings for 2.5-Gb/s operations.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.221-228
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• 2011

This paper describes 250-Mb/s fiber optic transmitter and receiver ICs for plastic optical fiber applications using a$ 0.18-{\mu}m$ CMOS technology. Simple signal and light detection schemes are introduced for power reduction in sleep mode. The transmitter converts non-return-to-zero digital data into 650-nm visible-red light signal and the receiver recovers the digital data from the incident light signal through up to 50-m plastic optical fiber. The transmitter and receiver ICs occupy only 0.62 $mm^2$ of area including electrostatic discharge protection diodes and bonding pads. The transmitter IC consumes 23 mA with 20 mA of LED driving currents, and the receiver IC consumes 16 mA with 4 mA of output driving currents at 250 Mb/s of data rate from a 3.3-V supply in active mode. In sleep mode, the transmitter and receiver ICs consume only 25 ${\mu}A$ and 40 ${\mu}A$, respectively.

• Journal of the Optical Society of Korea
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• v.17 no.1
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• pp.44-49
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• 2013

A transimpedance amplifier (TIA)-optical receiver (Rx) using two intersecting active feedback system with regulated-cascode (RGC) input stage has been designed and implemented for optical interconnects. The optical TIA-Rx chip is designed in a 0.13 ${\mu}m$ CMOS technology and works up to 10 Gbps data rate. The TIA-Rx chip core occupies an area of 0.051 $mm^2$ with power consumption of 16.9 mW at 1.3 V. The measured input-referred noise of optical TIA-Rx is 20 pA/${\surd}$Hz with a 3-dB bandwidth of 6.9 GHz. The proposed TIA-Rx achieved a high gain-bandwidth product per DC power figure of merit of 408 $GHz{\Omega}/mW$.

• Journal of Biomedical Engineering Research
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• v.21 no.5
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• pp.513-517
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• 2000

In this study, we fabricated the advanced telemetry system that transmitting media use radio frequency(RF) for the middle range measurement of the physiological signals and receiving media use optical for electromagnetic interference problem. The telemetry system within a size of 65$\times$125$\times$45mm consists of three parts: a RF transmitter, a optical receiver and a physiological signal processing CMOS one chip. Advantages of proposed telemetry system is wireless middle range(50m) FM transmission, reduce electromagnetic interference to a minimum which enables a comfortable bed-side telemetry system.

• ETRI Journal
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• v.31 no.5
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• pp.622-624
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• 2009

This letter presents a compact 2.5 Gb/s burst-mode receiver using the first reported monolithic amplifier IC developed with 0.25 ${\mu}m$ SiGe BiCMOS technology. With optimum avalanche photodiode gain, the receiver module can obtain a fast response, high sensitivity and wide dynamic range, satisfying the overhead timing and various power specifications for a 2.5 Gb/s next-generation passive optical network (PON), as well as a legacy 1.25 Gb/s PON in the upstream.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.2
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• pp.1-8
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• 2004

This paper describes the design of monolithic optical transceiver circuitry being used as a part of the fiber optic modules. It has been designed in 0.6 ${\mu}{\textrm}{m}$ 2-poly 3 metal silicon CMOS analog technology and operates at 155.52 Mbps(STM-1) data rates. It drives laser diode to transmit intensity modulated optical signal according to 155.52 Mbps electrical data from system. Also, it receives 155.52 Mbps optical data that transmitted from other systems and converts it to electrical data using photo diode and amplifier. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. The die area is 4 ${\times}$ 4 $\textrm{mm}^2$ and the estimated power dissipation is less than 900 ㎽ with a single 5 V supply.