• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.1
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• pp.123-129
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• 2023

In this paper, the frequency synthesis(FS) MMIC and the receive MMICs were developed for a Ka-band compact radar. Also a compact Ka-band frequency synthesizer and a receiver were developed based on those MMICs. The FS MMIC and the wireless-receiver(WR) MMIC to receive the baseband frequency were manufactured by a 65 nm CMOS process and the front-end(FE) MMIC to receive the Ka-band frequency was manufactured by a 150 nm GaN process. Linear frequency modulation waveform and pulse waveform for the transmit signal were measured by output signal of frequency synthesizer. The measured performance of developed receiver including the FE MMICs and the WR MMIC were ≧ 80 dB gain, ≦ 6 dB noise figure and ≧ 10 dBm at OP1dB. The measurement results of the developed frequency synthesizer and the receiver including the manufactured MMICs showed that they could be applied to Ka-band compact radar.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.270-273
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• 2003

The design, fabrication, and measured result of a 4.7 GHz differential VCO (Voltage Controlled Oscillator) for a 5.2 GHz WLAN (Wireless Local Area Network) applications is presented. The circuit is designed in a 0.35 mm technology employing three metal layers. The design is based on a fully integrated LC tank using spiral inductors. Measured tuning range is 10% of oscillation frequency with a control voltage from 0 to 3.0 V. Oscillation power of $\square$ 2.3 dBm at 4.63 GHz is measured with 21 mA DC current at 3V supply. The phase noise is $\square$ 104.17 dBc/Hz at 1 MHz offset.

• Journal of Navigation and Port Research
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• v.36 no.9
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• pp.737-740
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• 2012

A miniaturized CMOS bandpass filter for a single RF transceiver system is presented, using diagonally end-shorted coupled lines and lumped capacitors. In contrast to conventional miniaturized coupled line filters, it is proven that the effective permittivity variation of the coupled transmission line has no effect on shifting the center frequency when the bandpass filter is highly miniaturized. A bandpass filter at a center frequency of 2 GHz was fabricated by $0.18{\mu}m$ CMOS technology. The insertion loss with the die area of $1500{\mu}m{\times}1000{\mu}m$ is -5.14 dB. Simulated results are well agreed with the easurements. It also verify the center frequency stability in the compact size bandpass filter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.4
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• pp.289-294
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• 2008

A 77 GHz 3-stage low noise amplifier (LNA) employing one common source and two cascode stages is developed using $0.13{\mu}m$ CMOS process. To compensate for the low gain which is caused by lossy silicon substrate and parasitic element of CMOS transistor, positive feedback technique using parasitic inductance of bypass capacitor is adopted to cascode stages. The developed LNA shows gain of 7.2 dB, Sl1 of -16.5 dB and S22 of -19.8 dB at 77 GHz. The return loss bandwidth of LNA is 71.6 to 80.9 GHz (12%). The die size is as small as $0.7mm\times0.8mm$ by using bias line as inter-stage matching networks. This LNA shows possibility of 77 GHz automotive RADAR system using $0.13{\mu}m$ CMOS process, which has advantage in cost compared to sub-100 nm CMOS process.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.4
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• pp.286-297
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• 2017

This paper is a study of 6~18 GHz wideband high power amplifier which is composed of 10 single amplifier and coaxial type spatial power combiner. The property of this spatial power combiner is on a similar principle to antipodal antenna radiation mechanism. Therefore, the key structure of proposed spatial power combiner is the antipodal finline PCB board and the finline curve shape is numerically synthesized by using Klopfensein's optimum impedance taper. The measured CW output power of spatial combined high power amplifier is nearly 50 W. In conclusion we prove the good combining performance between the spatial power combiner and 10 single amplifier over 6~18 GHz frequency ranges. Also, we developed the key component PA and MFC MMIC which controls the phase and gain of the each amplifier, The main characteristic of MFC MMIC is to maximize combining efficiency of power amplifier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.3
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• pp.278-285
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• 2013

In this paper, a 100~110 GHz LNA and A coupler using standard 65 n CMOS process is presented. The LNA consists of three common source FET stages. A few layout types are considered to get high gain characteristic of unit common source cell. Also, optimized performance to achieve low noise characteristic and enough gain. Coupler is composed of broadside coupler using multimetal in CMOS fabrication. In the coupler, the metal strip to meet density rule is used, and the coupler is designed with consideration of the metal strip to function properly. Gain of fabricated LNA is 5.64 dB at 100 GHz and 6.39 dB at 110 GHz. Bandwidth is over 10 % and noise figure is 11.66 dB at 100 GHz. Fabricated coupler has shown insertion loss of 2~3 dB at 100~110 GHz band. Magnitude mismatch of coupler is below 1 dB and phase mismatch of coupler is below $5^{\circ}$.

• Journal of IKEEE
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• v.20 no.3
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• pp.279-284
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• 2016

This paper presents a two stage L-band power amplifier realized with a $0.32{\mu}m$ Silicon-On-Insulator (SOI) CMOS technology. To overcome a low breakdown voltage limit of MOSFET, stacked-FET structures are employed, where three transistors in the first stage amplifier and four transistors in the second stage amplifier are connected in series so that their output voltage swings are added in phase. The stacked-FET structures enable the proposed amplifier to achieve a 21.5 dB small-signal gain and 15.7 dBm output 1-dB compression power at 1.9 GHz with a 122 mA DC current from a 4 V supply. The amplifier delivers a 19.7 dBm. This paper presents a two stage L-band power amplifier realized with a $0.32{\mu}m$ Silicon-On-Insulator (SOI) CMOS technology. To overcome a low breakdown voltage limit of MOSFET, stacked-FET structures are employed, where three transistors in the first stage amplifier and four transistors in the second stage amplifier are connected in series so that their output voltage swings are added in phase. The stacked-FET structures enable the proposed amplifier to achieve a 21.5 dB small-signal gain and 15.7 dBm output 1-dB compression power at 1.9 GHz with a 122 mA DC current from a 4 V supply. The amplifier delivers a 19.7 dBm saturated output power with a 16 % maximum Power Added Efficiency (PAE). A bond wire fine tuning technology enables the amplifier a 23.67 dBm saturated output power with a 20.4 % maximum PAE. The die area is $1.9mm{\times}0.6mm$.

• ETRI Journal
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• v.42 no.5
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• pp.781-789
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• 2020

In this study, an E-band low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) has been designed using silicon-germanium 130-nm bipolar complementary metal-oxide-semiconductor technology to suppress unwanted signal gain outside operating frequencies and improve the signal gain and noise figures at operating frequencies. The proposed impedance-controllable filter has series (R_s) and parallel (R_p) resistors instead of a conventional inductor-capacitor (L-C) filter without any resistor in an interstage matching circuit. Using the impedance-controllable filter instead of the conventional L-C filter, the unwanted high signal gains of the designed E-band LNA at frequencies of 54 GHz to 57 GHz are suppressed by 8 dB to 12 dB from 24 dB to 26 dB to 12 dB to 18 dB. The small-signal gain S₂₁ at the operating frequencies of 70 GHz to 95 GHz are only decreased by 1.4 dB to 2.4 dB from 21.6 dB to 25.4 dB to 19.2 dB to 24.0 dB. The fabricated E-band LNA MMIC with the proposed filter has a measured S₂₁ of 16 dB to 21 dB, input matching (S₁₁) of -14 dB to -5 dB, and output matching (S₂₂) of -19 dB to -4 dB at E-band operating frequencies of 70 GHz to 95 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.9
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• pp.936-943
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• 2013

This work presents the design and measured results of the single channel automotive radar system for 76.5~77 GHz long range FMCW radar applications. The transmitter uses a commercial GaAs monolithic microwave integrated circuit(MMIC) and the receiver uses the down converter designed using 65 nm CMOS process. The output power of the transmitter is 10 dBm. The down converter chip can operate at low LO power as -8 dBm which is easily supplied from the transmitter output using a coupled line coupler. All MMICs are mounted on an aluminum jig which embeds the WR-10 waveguide. A microstrip to waveguide transition is designed to feed the embedded waveguide and finally high gain horn antennas. The overall size of the fabricated radar system is $80mm{\times}61mm{\times}21mm$. The radar system achieved an output power of 10 dBm, phase noise of -94 dBc/Hz at 1 MHz offset and a conversion gain of 12 dB.

• ETRI Journal
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• v.26 no.4
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• pp.307-314
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• 2004

The application of a discrete pseudomorphic high electron mobility transistor (p-HEMT) as a grounded switch allows for the development of low cost phase shifters and phase modulators operating in a Ku band. This fills the gap in the development of phase control devices comprising p-i-n diodes and microwave monolithic integrated circuits (MMICs). This paper describes a discrete p-HEMT characterization and modeling in switching mode as well as the development of a low-cost four-bit phase shifter and direct quadrature phase shift keying (QPSK) modulator. The developed devices operate in a Ku band with parameters comparable to commercially available MMIC counterparts. Both of them are CMOS compatible and have no power consumption. The parameters of the QPSK modulator are very close to the requirements of available standards for satellite earth stations.