• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.8
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• pp.5195-5200
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• 2014

White LEDs are expected to be applied widely as a lighting system. To make white LED chips, one requires a mixture with silicon and a phosphor coating on a LED blue chip. The process of preparing a mixture with silicon using phosphor involves the use of discarded phosphor in the chip process. Reducing the costs of chip production depends on many factors, such as the mixture errors, exposure over time of silicon, and changes in the characteristics of blue chip. This paper reports the characteristics of a white LED chip manufactured through a reproduction process of derelict phosphor. This method was applicable to a real LED flashlight. A derelict phosphor chip showed similar results to a normal white chip for the degradation of cd 3.2[Cd] and 3.6[Cd], color temperature, 57[K] and 58[K], and maximum white wavelength 444.3[nm] and 449.8[nm]. These results are expected to make ea great contribution to cost reduction.

• KSBB Journal
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• v.20 no.3
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• pp.197-204
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• 2005

Lab-on-a-chip is a miniaturized analytical device in which all of the procedures for the analysis of molecules are carried out, such as pretreatment, reaction, separation, detection, etc. Lab-on-a-chip has increasing concern as a device not only for rapid detection of molecules but also for high throughput screening and point of care, because conventional laborious and time consuming analytical procedures can be substituted. Thus, a lot of microfabrication and analytical techniques for lab-on-a-chip have been developed with microstructures smaller than a few hundreds of micrometers. Separation of the molecules is one of the most important components of lab-on-a-chip, because effective separation method can simplify the design and can provide better sensitivity. The electrokinetic separation based on capillary electrophoresis is most widely employed technique in lab-on-a-chip for the control of fluids and the separation of molecules. In this article, bioseparation techniques and its applications realized in lab-on-a-chip are reviewed.

• Korean Journal of Optics and Photonics
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• v.28 no.4
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• pp.135-140
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• 2017

In this paper, we report measured results for an all-fiber $7{\times}1$ pump combiner based on an optical fiber chip for high-power fiber lasers. An optical-fiber chip was fabricated by etching a fiber, having core and cladding diameters of 20 and $400{\mu}m$, in the longitudinal direction. To both ends of the etched chip, we spliced input and output fibers. First, we tied together seven optical fibers, having core and cladding diameters of 105 and $125{\mu}m$ respectively, in a cylindrical bundle and spliced them to the $375-{\mu}m$ end of the optical-fiber chip. Then, we attached an output DCF with core and cladding diameters of 25 and $250{\mu}m$ to the $250-{\mu}m$ end of the optical-fiber chip. Finally, the fabricated $7{\times}1$ pump combiner showed an average optical coupling efficiency of about 90.2% per port. This chip-based pump combiner may replace conventional pump combiners by massive production of fiber chips.

• Korean Journal of Organic Agriculture
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• v.10 no.4
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• pp.69-78
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• 2002

This experiment was conducted to investigate the changes of sugar contents and chip color during 104days storage after harvesting of five potato varieties. The potato varieties were planted on 1st April in 1999 and harvested on 10. July in 1999. $No_2$ contents in potato petiole tended to decrease repidly at tuber maturing stage. $K^+$ contents in potato petiole tended to in crease at 70 days ofter planting on medium maturing varieties, and at 90 days after planting on late maturing variety. Snowden variety was no desirable cultivar for processing on spring cultivation due to long growth period. Contents of solid and sugar in potatoes affected on potato chip color. Higher contents of solid in potato varieties showed low sugar contents and no change on chip color during storage.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.9
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• pp.465-474
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• 2005

For high density SoC design, on-chip communication based on bus interconnection encounters bandwidth limitation while an NoC(Network-on-Chip) approach suffers from unacceptable complexity in its Implementation. This paper introduces a new on-chip communication protocol, SNP (SoC Network Protocol) to overcome these problems. In SNP, conventional on-chip bus signals are categorized into three groups, control, address, and data and only one set of wires is used to transmit all three groups of signals, resulting in the dramatic decrease of the number of wires. SNP efficiently supports master-master communication as well as master-slave communication with symmetric channels. A sequencing rule of signal groups is defined as a part of SNP specification and a phase-restoration feature is proposed to avoid redundant signals transmitted repeatedly over back-to-back transactions. Simulation results show that SNP provides about the same bandwidth with only $54\%$ of wires when compared with AMBA AHB.

• Resources Recycling
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• v.25 no.6
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• pp.3-12
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• 2016

In this study, Au distribution in F-PGA chip and W-BGA chip were examined to recover Au effectively from CPU chips. The result showed that 80.8% and 89.8% of Au exist in terminal of F-PGA chip and bare die of W-BGA chip, respectively. Based on the fact that Au exists in specific parts of the chips, an CPU chip dismantling apparatus was developed. The experimental variables were roller rotating speed, heat temperature of IR heater and heating time. Terminals of F-PGA chips were completely recovered under the temperature of $300^{\circ}C$ and the residence time of 90 s. Bare dies of W-BGA chips were completely recovered as well under the temperature of $300^{\circ}C$, the roller rotating rate of 90 rpm and the residence time of 90 s.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.4
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• pp.1-10
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• 2020

This paper reviews the recent development of electronic textile technology, mainly focusing on chip-textile bonding. Before the chip-textile bonding, a circuit on the textile should be prepared to supply the electrical power and signal to the chip mounted on the fabrics. Either embroidery with conductive yarn or screen-printing with the conductive paste can be applied to implement the circuit on the fabrics depending on the circuit density and resolution. Next, chip-textile bonding can be performed. There are two choices for chip-textile bonding: fixed connection methods such as soldering, ACF/NCA, embroidery, crimping, and secondly removable connection methods like a hook, magnet, zipper. Following the chip-textile bonding process, the chip on the textile is generally encapsulated using PDMS to ensure reliability like water-proof.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2007.11a
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• pp.293-294
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• 2007

• The Academic Congress of Korean Shoulder and Elbow Society
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• 2007.03a
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• pp.82-83
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• 2007

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.10a
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• pp.13-14
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• 2012