• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.49 no.3
• /
• pp.21-29
• /
• 2012

This paper presents optimized searching technique to improve the performance of H.264/AVC. By using the proposed forward and backward searching algorithm, redundant cycles of latency for data reordering can be removed. Furthermore, in order to reduce the total number of execution cycles of CAVLC encoder, early termination mode and two stage pipelined architecture are proposed. The experimental result shows that the proposed architecture needs only 36.0 cycles on average for each $16{\times}16$ macroblock encoding. The proposed architecture improves the performance by 57.8% than that of previous designs. The proposed CAVLC encoder was implemented using Verilog HDL and synthesized with Magnachip $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count is about 17K with 125Mhz clock frequency.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.2
• /
• pp.299-302
• /
• 2005

요즘 시대는 영상 기술과 IT 발전으로 다양한 멀티미디어 서비스를 제공하기 위해 고품질의 비디오와 높은 데이터 압축을 요구하게 되었고, 이를 위해 MPEG-4 AVC/H.264에서는 기존의 MPEG-4에서 채택한 VLC 기술과 유사한 Context-based Adaptive Variable Length Code(CAVLC)기술을 채택하여 이를 가능하게 하였다. 특히 CAVLC 기술은 HDTV처럼 큰 영상 뿐 아니라 카메라폰이나 DMB등과 같은 영상에서 고품질의 영상을 보다 효율적으로 제공 한다. 본 논문은 최근의 이미지와 비디오 압축에 대한 요구에 따라 H.264/AVC와 MPEG4-PART 1-에서 표준으로 채택한 CAVLC의 부호화 과정을 연구하여 Visual C++언어를 이용한 최적화된 시뮬레이션과 CAVLC의 성능평가를 통한 최적화를 실시하였고, 최적화된 예측 정보를 바탕으로 CAVLC를 VHDL언어를 이용하여 하드웨어로 구현하였다.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.7
• /
• pp.1485-1490
• /
• 2005

Variable length code is an integral component of many international standards on image and video compression currently. Context-based Adaptive Variable Length Coding(CAVLC) is adopted by the emerging JVT(also called H.264, and AVC in MPEG-4). In this paper, we design an architecture for CAVLC encoder, including a coeff_token encoder, level encoder, total_zeros encoder and run_before encoder. The designed CAVLC encoder can encode one syntax element in one clock cycle. As a result of implementation by Vertex-1000e of Xilinx, its operation frequency is 68MHz. Therefore, it is very suitable for video applications that require high throughput.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.7 s.361
• /
• pp.45-53
• /
• 2007

In this paper, we propose an efficient hardware architecture for H.264/AVC CAVLC (Context-based Adaptive Variable Length Coding) encoding. Previous CAVLC architectures search all of the coefficients to find statistic characteristics in a block. However, it is unnecessary information that zero coefficients following the last position of a non-zero coefficient when CAVLC encodes residual coefficients. In order to reduce this unnecessary operation, we propose two techniques, which detect the first and last position of non-zero coefficients and arrange non-zero coefficients sequentially. By adopting these two techniques, the required processing time was reduced about 23% compared with previous architecture. It was designed in a hardware description language and total logic gate count is 16.3k using 0.18um standard cell library Simulation results show that our design is capable of real-time processing for $1920{\times}1088\;30fps$ videos at 81MHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.10a
• /
• pp.431-435
• /
• 2011

This paper presents optimized searching technique to improve the performance of H.264/AVC. The proposed CAVLC encoder uses forward and backward searching algorithm to compute the parameters. By zero-block skipping technique and pipelined scheduling, the proposed CAVLC encoder can obtain better performance. The experimental result shows that the proposed architecture needs only 66.6 cycles on average for each $16{\times}16$ macroblock encoding. The proposed architecture improves the performance by 13.8% than that of previous designs. The proposed CAVLC encoder was implemented using VerilogHDL and synthesized with Megnachip $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count is about 15.6K with 125Mhz clock frequency.

• ETRI Journal
• /
• v.30 no.1
• /
• pp.167-169
• /
• 2008

In this paper, we propose hardware architecture for a high-speed context-adaptive variable length coding (CAVLC) decoder in H.264. In the CAVLC decoder, the codeword length of the current decoding block is used to determine the next input bitstreams (valid bits). Since the computation of valid bits increases the total processing time of CAVLC, we propose two techniques to reduce processing time: one is to reduce the number of decoding steps by introducing a lookup table, and the other is to reduce cycles for calculating the valid bits. The proposed CAVLC decoder can decode $1920{\times}1088$ 30 fps video in real time at a 30.8 MHz clock.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2008.10a
• /
• pp.108-111
• /
• 2008

In this paper, we propose an advanced hardware architecture for the CAVLC entropy encoder engine for real time Full HD video compression. Since there are 384 data coefficients which are sum of 376 AC coefficient and 8 DC coefficient per one macroblock, 384 coefficient have to be processed per one macroblock in worst case for real time processing. We propose an novel architecture which includes parallel architecture and pipeline processing, and reduction "0" in AC/DC coefficient table. To verify the proposed architecture, we develop the reference C for CAVLC and verified the designed circuit with the test vector from reference C code.

• Journal of IKEEE
• /
• v.17 no.3
• /
• pp.352-359
• /
• 2013

This paper proposes an entropy coding unit for H.264/AVC baseline profile. Entropy coding requires code tables for macroblock encoding. There are patterns in codewords of each code tables. In this paper, the patterns between codewords are analyzed to reduce the hardware cost. The entropy coding unit consists of Exp-Golomb unit and CAVLC unit. The Exp-Golomb unit can process five code types in a single unit. It can perform Exp-Golomb processing using only two adders. While typical CAVLC units use various code tables which require large amounts of resources, the sizes of the tables are reduced to about 40% or less of typical CAVLC units using relationships between table elements in the proposed CAVLC unit. After the Exp-Golomb unit and the CAVLC unit generate code values, the entropy unit uses a small size shifter for bit-stream generation while typical methods are barrel shifters.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.45 no.1
• /
• pp.64-74
• /
• 2008

It is well-known that the coding efficiency of CABAC which is one of the entropy coding methods in H.264/AVC is lower than that of CAVLC at high bitrate in intra coding, even if CABAC shows higher coding efficiency than CAVLC. Therefore, for high quality video application, this paper proposes new binarization methods about the quantized DCT coefficients that are partitioned into four regions such that CABAC shows similar coding efficiency to CAVLC at high bitrate. The proposed binarization methods consist of separate binarization tables about the four partitioned DCT coefficients considering the statistical characteristics of the quantized DCT coefficients. The proposed binarizaton method for the quantized DCT coefficients shows higher coding efficiency than CABAC in H.264/AVC and shows very similar result to CAVLC at high bitrate.

• Proceedings of the Korean Society of Broadcast Engineers Conference
• /
• 2009.11a
• /
• pp.107-110
• /
• 2009

본 논문에서는 무손실 위성 영상 압축의 효율을 높이기 위해 H.264/AVC의 무손실 화면내 부호화에 기반한 새로운 문맥기반 적응적 가변 길이 부호화 (CAVLC) 방법을 제안한다. 기존의 H.264/AVC의 CAVLC는 손실 압축에 적합하게 설계되었기 때문에, 변환과 양자화 과정을 수행하지 않는 무손실 압축에서 최적의 압축 성능을 제공하지 못한다. 본 논문에서는 손실 압축과 무손실 압축 환경에서 잔여 영상 신호의 통계적 차이가 있음을 확인하고, 무손실 위성 영상 압축 환경에서 잔여 신호의 통계적 특성을 고려하여 향상된 CAVLC 기반의 무손실 위성 영상 압축 방법을 제안한다. 제안한 방법을 사용하여 위성 영상을 압축한 결과 기존의 대표적인 무손실 영상 압축 방법인 JPEG-LS와 CALIC 보다 약 12% 정도 비트 수를 감소시켰다.