• Title/Summary/Keyword: C-V characteristic curve

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Extraction of Average Interface Trap Density using Capacitance-Voltage Characteristic at SiGe p-FinFET and Verification using Terman's Method (SiGe p-FinFET의 C-V 특성을 이용한 평균 계면 결함 밀도 추출과 Terman의 방법을 이용한 검증)

  • Kim, Hyunsoo;Seo, Youngsoo;Shin, Hyungcheol
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.4
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    • pp.56-61
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    • 2015
  • Ideal and stretch-out C-V curve were shown at high frequency using SiGe p-FinFET simulation. Average interface trap density can be extracted by the difference of voltage axis on ideal and stretch-out C-V curve. Also, interface trap density(Dit) was extracted by Terman's method that uses the same stretch-out of C-V curve with interface trap characteristic, and average interface trap density was calculated at same energy level. Comparing the average interface trap density, which was found by method using difference of voltage, with Terman's method, it was verified that the two methods almost had the same average interface trap density.

ACCURACY CURVES: AN ALTERNATIVE GRAPHICAL REPRESENTATION OF PROBABILITY DATA

  • Detrano Robert
    • 대한예방의학회:학술대회논문집
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    • 1994.02b
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    • pp.150-153
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    • 1994
  • Receiver operating characteristic (ROC) curves have been frequently used to compare probability models applied to medical problems. Though the curves are a measure of the discriminatory power of a model. they do not reflect the model's accuracy. A supplementary accuracy curve is derived which will be coincident with the ROC curve if the model is reliable. will be above the ROC curve if the model's probabilities are too high or below if they are too low. A clinical example of this new graphical presentation is given.

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The Structure, Surface Morphology and Electrical Properties of ZrO2 Metal-insulator-metal Capacitors (ZrO2 MIM 캐패시터의 구조, 표면 형상 및 전기적 특성)

  • Kim Dae Kyu;Lee Chongmu
    • Korean Journal of Materials Research
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    • v.15 no.2
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    • pp.139-142
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    • 2005
  • [ $ZrO_2$ ] gate dielectric thin films were deposited by radio frequency (rf)-magnetron sputtering and its structure, surface morphology and electrical peoperties were studied. As the oxygen flow rate increases, the surface becomes smoother. The experimental results indicate that a high temperature annealing is desirable since it improves the electrical properties of the $ZrO_2$ gate dielectric thin films by decreasing the number of interfacial traps at the $ZrO_2/Si$ interface. The carrier transport mechanism is dominated by the thermionic emission.

Comparison of Tunneling Characteristics in the MTJs of CoFeB/MgO/CoFeB with Lower and Higher Tunneling Magnetoresistance

  • Choi, G.M.;Shin, K.H.;Seo, S.A.;Lim, W.C.;Lee, T.D.
    • Journal of Magnetics
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    • v.14 no.1
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    • pp.11-14
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    • 2009
  • We investigated the I-V curves and differential tunneling conductance of two, CoFeB/MgO/CoFeB-based, magnetic tunnel junctions (MTJs): one with a low tunneling magnetoresistance (TMR; 22%) and the other with a high TMR (352%). This huge TMR difference was achieved by different MgO sputter conditions rather than by different annealing or deposition temperature. In addition to the TMR difference, the junction resistances were much higher in the low-TMR MTJ than in the high-TMR MTJ. The low-TMR MTJ showed a clear parabolic behavior in the dI/dV-V curve. This high resistance and parabolic behavior were well explained by the Simmons' simple barrier model. However, the tunneling properties of the high-TMR MTJ could not be explained by this model. The characteristic tunneling properties of the high-TMR MTJ were a relatively low junction resistance, a linear relation in the I-V curve, and conduction dips in the differential tunneling conductance. We explained these features by applying the coherent tunneling model.

0.35㎛ CMOS Low-Voltage Current/Voltage Reference Circuits with Curvature Compensation (곡률보상 기능을 갖는 0.35㎛ CMOS 저전압 기준전류/전압 발생회로)

  • Park, Eun-Young;Choi, Beom-Kwan;Yang, Hee-Jun;Yoon, Eun-Jung;Yu, Chong-Gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.527-530
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    • 2016
  • This paper presents curvature-compensated reference circuits operating under low-voltage condition and achieving low-power consumption with $0.35-{\mu}m$ standard CMOS process. The proposed circuit can operate under less than 1-V supply voltage by using MOS transistors operating in weak-inversion region. The simulation results shows a low temperature coefficient by using the proposed curvature compensation technique. It generates a graph-shape temperature characteristic that looks like a sine curve, not a bell-shape characteristic presented in other published BGRs without curvature compensation. The proposed circuits operate with 0.9-V supply voltage. First, the voltage reference circuit consumes 176nW power and the temperature coefficient is $26.4ppm/^{\circ}C$. The current reference circuit is designed to operate with 194.3nW power consumption and $13.3ppm/^{\circ}C$ temperature coefficient.

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The Characteristics of $PbTiO_{3}-PbZrO_{3}-Pb(Ni_{1/3}Nb_{2/3})O_{3}$ Piezoelectric Thin Film Made by Sol-Gel Method (Sol-Gel 법으로 제작한 $PbTiO_{3}-PbZrO_{3}-Pb(Ni_{1/3}Nb_{2/3})O_{3}$ 압전박막의 특성)

  • Yoon, Wha-Joong;Lim, Moo-Yeol;Koo, Kyung-Wan
    • Journal of Sensor Science and Technology
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    • v.4 no.4
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    • pp.75-80
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    • 1995
  • In order to fabricate the piezoelectric thin film of the PZT-PNN ternary compound, the metal alkoxides were used as starting materials. The electrical and crystalline properties of the thin film were evaluated. The X- RD study shows that the crystallization of the film is optimized at $550^{\circ}C$ of sintering temperature. According to the D-E hysterisis curve, the coercive field is 28.8 kV /cm, and the remanent polariztion is $18.3\;{\mu}C/cm^{2}$. The break down voltages of the thin films are $76.0\;{\sim}\;27.0\;MV/m$. When the sintering temperature is raised, the break down voltage is lowered. As a result of measuring the C-V characteristic curve of the ternary compound piezoelectric thin film, the relative dielectric constants are 406 for the composition (50:40:10), 1084 for the composition (50:30:20), 723 for the composition (45:35:20) and 316 for the composition (40:40:20).

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Fabrication and electrical characteristic analysis of poly-Si TFT with lateral body (측면 기판 단자를 갖는 다결정 실리콘 박막 트랜지스터의 제작과 전기적 특성 분석)

  • Choi, H.B.;Yoo, J.S.;Kim, C.H.;Han, M.K.
    • Proceedings of the KIEE Conference
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    • 1998.07d
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    • pp.1462-1464
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    • 1998
  • Poly-Si TFT(Thin Film Transistor) is a electronic device that can be applied to the field of large area electronics such as AMLCD. We have fabricated the poly-Si TFT with lateral body terminal that is counter-doped body electrode and investigated the electrical characteristics of it. The lateral body terminal being short with s terminal, we have measured the transfer charac (Vg-ld) and the output characteristic (Vd-ld) fabricated devices. The measured result showe only that leakage current in OFF-state was re and Kink effect in ON-state was suppressed bu that in output characteristic curve the output Id was sustained constantly with the output v Vd in the saturation region.

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Analysis of the Current-voltage Curves of a Cu(In,Ga)Se2 Thin-film Solar Cell Measured at Different Irradiation Conditions

  • Lee, Kyu-Seok;Chung, Yong-Duck;Park, Nae-Man;Cho, Dae-Hyung;Kim, Kyung-Hyun;Kim, Je-Ha;Kim, Seong-Jun;Kim, Yeong-Ho;Noh, Sam-Kyu
    • Journal of the Optical Society of Korea
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    • v.14 no.4
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    • pp.321-325
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    • 2010
  • We analyze the current density - voltage (J - V) curve of a Cu(In,Ga)$Se_2$ (CIGS) thin-film solar cell measured at different irradiation power densities. For the solar-cell sample investigated in this study, the fill factor and power conversion efficiency decreased as the irradiation power density (IPD) increased in the range of 2 to 5 sun. Characteristic parameters of solar cell including the series resistance ($r_s$), the shunt resistance ($r_{sh}$), the photocurrent density ($J_L$), the saturation current density ($J_s$) of an ideal diode, and the coefficient ($C_s$) of the diode current due to electron-hole recombination via ionized traps at the p-n interface are determined from a theoretical fit to the experimental data of the J - V curve using a two-diode model. As IPD increased, both $r_s$ and $r_{sh}$ decreased, but $C_s$ increased.

The Electrical Properties of SBT Thin Film for Semiconductor Device (반도체 소자용 SBT 박막의 전기적특성)

  • Oh, Yong-Cheul;Cho, Choon-Nam;Kim, Jin-Sa;Shin, Chul-Ki;Hong, Jin-Woong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05d
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    • pp.86-89
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    • 2003
  • SBT thin film for semiconductor device that is made by RF magnetron sputtering method studied electrical properties under various temperature condition. Dielectric constant who differ annealing condition appears highest in $750[^{\circ}C]$ and it is 213. Also, C-V properties by annealing temperature of SBT thin film for semiconductor device is no change almost to $600[^{\circ}C]$ and shows non-linear butterfly shape more than $650[^{\circ}C]$ Maximum capacitance and difference of smallest capacitance show the biggest difference in $750[^{\circ}C]$ as degree that domain wall motion contributes in ferrelectric polarization value in C-V characteristic curve of ferroelectric that this shows typical ferroelectric properties. Therefore, SBT thin film for semiconductor device that is annealing in $750[^{\circ}C]$ expressed the most superior electrical and ferroelectric properties.

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Effects of NH3 on the Growth of Oxide Film by Infrared-CVD Method (적외선 CVD 방법을 이용한 산화막 성장에 $NH_3$가 미치는 영향)

  • Lee, Chul-Seung;Chung, Kwan-Soo;Kim, Chul-Ju
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.11
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    • pp.1329-1334
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    • 1988
  • A new method was developed for growing oxidation film by thermal reaction of $NH_3$ and $O_2$. The growth rate increased with the increase of partial pressure of $NH_3$. Optical transparency of the growth film was 12% at the wave number 1100 $cm^{-1}$ compared with 17% by thermal dry oxidation method, and the quality was much better. In C-V characteristic curve, $Q_{OX}$ was almost equal to $Q_{SS}$ and no hysteresis phenomena was observed. n-MOS transistors fabricated with this new method showed $I_D$-$V_{DS}$ characteristics better than thermal dry oxidation method.

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