• Journal of Advanced Navigation Technology
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• v.16 no.2
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• pp.351-359
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• 2012

This paper deals with the design and development of the remote control and measurement systems using CDMA(Code Division Multiple Access) data modem. We propose a bi-directional data communication link without the public IP address in CDMA modem device by the TCP/IP packet and SMS(Short Message Service) communication. The remote control and measurement systems are implemented by a Telit WM-800 modem as DCE(Data Communication Equipment), and Atmel AT89C51 microcontroller as DTE(Data Terminal Equipment). The user application software for the control and measurement system user, and the firmware software of device drivers for peripherals such as a digital input/output device, AD/DAC(Analog to Digital/Digital to Analog Converter), LCD, and temperature/humidity sensor are written in Microsoft C and Keil C language respectively for further various applications. The experimental result of the proposed control and measurement systems implemented in this paper is evaluated via real-time experiments, which works well as designed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.1C
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• pp.65-73
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• 2006

The purpose of this study is to design and analyze the pre-modulation filter with the variable -3dB cutoff frequency and linear phase response for bandlimiting the allocation of radio frequency bandwidth in PCM/FM transmission system. For the implementation of this required filter, the digital FIR filter, DAC and variable 2nd order LPF have been constructed with the filter block which designed and analyzed by each stage in order to satisfy the attenuation characteristic requirement of the analog 7th order bessel filter. The paper also concerned the linear phase properties for the filter block. Especially we have carried out the linear phase simulation with real parts for variable 2nd order LPF and compared this simulation results with the one of the fixed bandwidth 2nd order bessel filter for validating the linear phase requirement.

• Korean Journal of Food Science and Technology
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• v.8 no.2
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• pp.85-89
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• 1976

The separation and determination of dicarbonyls such as diacetyl, methylglyoxal and triose reductone in their mixed aqueous solution were carried out by means of gas chromatography with transformation of these compounds into quinoxaline derivatives with o-phenylenediamine. A column used for this experiment was consisted of Celite 545 (80-100 mesh) coated with 5% Silicon Gum SE-30. The column temperature was $180^{\circ}C$. It is desirable that this approach will be applicable to dicabonyl study in gas chromatographic determination.

• Journal of Microbiology and Biotechnology
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• v.21 no.3
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• pp.243-251
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• 2011

The gene bolA was discovered in the 80's, but unraveling its function in the cell has proven to be a complex task. The BolA protein has pleiotropic effects over cell physiology, altering growth and morphology, inducing biofilm formation, and regulating the balance of several membrane proteins. Recently, BolA was shown to be a transcription factor by repressing the expression of the mreB gene. The present report shows that BolA is a transcriptional regulator of the dacA and dacC genes, thus regulating both DD-carboxypeptidases PBP5 and PBP6 and thereby demonstrating the versatility of BolA as a cellular regulator. In this work, we also demonstrate that reduction of cell growth and survival can be connected to the overexpression of the bolA gene in different E. coli backgrounds, particularly in the exponential growth phase. The most interesting finding is that overproduction of BolA affects bacterial growth differently depending on whether the cells were inoculated directly from a plate culture or from an overnight batch culture. This strengthens the idea that BolA can be engaged in the coordination of genes that adapt the cell physiology in order to enhance cell adaptation and survival under stress conditions.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1207-1210
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• 1998

차세대 DVD system의 audio 규격인 Dolby AC-3를 구현하는 방법으로 DSP 프로세서인 TMSC80을 사용하여 실시간 처리 가능한 하드웨어 바탕의 firmware 소프트웨어를 개발하는 방법으로 구현하고자 한다. 본 논문에서는 먼저 TMS320C80을 바탕으로 한 하드웨어 구현에 관해 논의한다. 하드웨어의 구조는 TMS320C80과 시스템 메모리로의 DRAM, 오디오 입력부인 ADC, 입력 데이터를 효과적으로 사용하기 위한 FIFO menory, 오디오 출력용인 dac, 디버깅 및 통신포트로 USB, RS-232,LPT와 MPEG-2 encoding보드 등 다른 보드와 연계를 위한 local-bus를 위한 dual port ram으로 구성된다. 오디오 입력은 최대 24bit 48kHz sampling까지 받을 수 있다.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.2
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• pp.205-213
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• 2002

This paper deals with the implementation of three-phase VSI systems which can control the power regenerated from DC bus line to AC supply. The overall system consists of the line-to-line voltage and line current sensors, an actual power calculator using d-q transformation method, a complex power controller with PI control scheme, a gating signal generator for modified ｑ-conduction mode, a DPLL for frequency followup, and Power circuits. Control board is constructed by using a 32-bit DSP TMS32C32, two EFLDs , six ADCs, and a DAC. To verify the performance of the proposed system, we designed and constructed the propotype with the power rating of 5kVA at AC 220V. Experimental results show that the regenerated active power is well controlled to its command vague and the regenerated reactive power still remained at nearly zero through all operating modes.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.990-993
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• 2005

This paper presents new results on designing a robust adaptive direct controller for a class of non-linear first order systems. The designing method based on the use of dead zone in the parameters' update law. It is shown that the size of the dead zone does not depend on the upper bounds of the disturbances. That means that even if the bounds are large, the tracking error will always converge to a set of the dead zone size. However, in the ideal case, when the exogenous signal functions and the function represents un-modeled dynamics of the systems equal to zero, the proposed controller does nt mean the convergence to zero of the tracking error. Computer simulation results show the effectiveness of the controller in dealing with the stated problems.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1955-1959
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• 2005

This paper presents a systematic analysis and a simple design of a robust adaptive control law for a class of non linear systems with modeling errors and a time-delay input. The theory for designing a robust adaptive control law based on input- output feedback linearization of non linear systems with uncertainties and a time-delay in the manipulated input by the approach of parameterized state feedback control is presented. The main advantage of this method is that the parameterized state feedback control law can effectively suppress the effect of the most parts of nonlinearities, including system uncertainties and time-delay input in the pp-coupling perturbation form and the relative order of non linear systems is not limited.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.4
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• pp.26-35
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• 1997

This paper proposes a multi-bit $\Sigma\Delta$ modulator arcitecture which eliminates signal clipping problem. To avoid signal clipping, the output values of intgrators are monitored and modified by a reference value. This oepration is recorded as a digital code to restore actual signal value. Due to the digital code, the substraction of feedback value from the multi-bit quantizer can be calculated by a digital adder and this simplifies dAC operation making the accurate DAC of conventional multi-bit $\Sigma\Delta$ modulator scheme unnecessary. These features make N-th modulator can be implemented by sharing an integrator among N stages to decrease the required chip area. As an experimental example, a 4th order .sum..DELTA. modulator with oversampling ratio of 64 was simulated to show over 130 DB SNR at rail-to-rail input sinusoidal signal.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.285-288
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• 2005

A 2.8 inch fully integrated SOP employing a high performance LTPS CMOS TFT technology has been developed for mobile display applications. The LCD module is directly interfaced with 3V 6-bit RGB source via timing control circuitry. The integrated data driver comprises a 6-bit hybrid type DAC with low power analog buffer.