• Journal of Information Science Theory and Practice
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• v.10 no.spc
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• pp.56-65
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• 2022

Korea Institute of Science and Technology Information (KISTI) is a Worldwide LHC Computing Grid (WLCG) Tier-1 center mandated to preserve raw data produced from A Large Ion Collider Experiment (ALICE) experiment using the world's largest particle accelerator, the Large Hadron Collider (LHC) at European Organization for Nuclear Research (CERN). Physical medium used widely for long-term data preservation is tape, thanks to its reliability and least price per capacity compared to other media such as optical disk, hard disk, and solid-state disk. However, decreasing numbers of manufacturers for both tape drives and cartridges, and patent disputes among them escalated risk of market. As alternative to tape-based data preservation strategy, we proposed disk-only erasure-coded archival storage system, Custodial Disk Storage (CDS), powered by Exascale Open Storage (EOS), an open-source storage management software developed by CERN. CDS system consists of 18 high density Just-Bunch-Of-Disks (JBOD) enclosures attached to 9 servers through 12 Gbps Serial Attached SCSI (SAS) Host Bus Adapter (HBA) interfaces via multiple paths for redundancy and multiplexing. For data protection, we introduced Reed-Solomon (RS) (16, 4) Erasure Coding (EC) layout, where the number of data and parity blocks are 12 and 4 respectively, which gives the annual data loss probability equivalent to 5×10^-14. In this paper, we discuss CDS system design based on JBOD products, performance limitations, and data protection strategy accommodating EOS EC implementation. We present CDS operations for ALICE experiment and long-term power consumption measurement.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.21 no.1
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• pp.1-16
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• 2022

Recently, e-scooters have been attracting attention as eco-friendly modes of transportation in cities due to an increasing interest in the environment. Accordingly, various studies on usage behavior are being conducted, but studies that reflect individual travel attitudes are insufficient. Therefore, this study surveyed commuters in Seoul and analyzed respondents' traveling attitudes through factor analysis. It also built a binary logistic regression model for the intention to use shared e-scooters to determine how individual travel behaviors are affected. In particular, the model results showed that age, the main mode of transportation (car), walking time to the bus stop, and four travel attitude variables (disutility of travel, preference to self-drive, internet/smartphone friendliness, and willingness to pay extra money for services) significantly affected the intention to use shared e-scooters. This study is expected to be used as basic data, with aspect to travel behavior, for the efficient operation and use of shared e-scooters in the future.

• Journal of Astronomy and Space Sciences
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• v.17 no.1
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• pp.53-66
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• 2000

We developed low light CCD imaging system using thermoelectric cooling method collaboration with a company to design a commercial model. It consists of Kodak KAF-0401E(768$\times$512 pixels) CCD chip, thermoelectric module manufactured by Thermotek. This TEC system can reach an operative temperature of $-25^{\circ}C$. We employed an Uniblitz VS25s shutter and it has capability a minimum exposure time 80ms. The system components are an interface card using a Korea Astronomy Observatory (hereafter KAO) ISA bus controller, image acquisition with AD9816 chip, that is 12bit video processor. The performance test with this imaging system showed good operation within the initial specification of our design. It shows a dark current less than 0.4e-/pixel/sec at a temperature of $-10^{\circ}C$, a linearity 99.9$\pm$0.1%, gain 4.24e-/adu, and system noise is 25.3e-(rms). For low temperature CCD operation, we designed a TEC, which uses a one-stage peltier module and forced air heat exchanger. This TEC imaging system enables accurate photometry($\pm$0.01mag) even though the CCD is not at 'conventional' cryogenic temperatures(140k). The system can be a useful instrument for any other imaging applications. Finally, with this system, we obtained several images of astronomical objects for system performance tests.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.74-85
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• 2015

PCI Express is a well-known and widely used de-facto system bus standard for connecting among a processor and IO devices. PCI Express is originated from old PCI standard, and its most of applications are limited to be used within a PC or server system. But, because of its fast speed, low power consumption, and good protocol efficiency, it is considered as one of a good candidate for an alternate system interconnect for many years. In this paper, we present design, implementation and early evaluation of an alternate system interconnect by utilizing PCI Express. The developed alternate system interconnect using PCI Express (named PCIeLINK) utilizes non-transparent bridging (NTB) technic which generally used in fail-over system in PCI and PCI Express. By using NTB technic, PCI Express device can be extended to outside of a system without electrical and logical problems arising during system boot and enumeration. To build up an alternate system interconnect, we designed and implemented a network interface card having multiple PCI Express ${\times}4$ connections (theoretically 20 Gbps) and tested, The early test results revealed that an ${\times}4$ port in the card showed 8.6 Gbps peak performance for bulk transmission and 5.1 Gbps peak for normal TCP/IP transfer.

• KIPS Transactions on Computer and Communication Systems
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• v.6 no.3
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• pp.105-112
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• 2017

PCI Express is a bus technology that connects the processor and the peripheral I/O devices that widely used as an industry standard because it has the characteristics of high-speed, low power. In addition, PCI Express is system interconnect technology such as Ethernet and Infiniband used in high-performance computing and computer cluster. PGAS(partitioned global address space) programming model is often used to implement the one-sided RDMA(remote direct memory access) from multi-host systems, such as computer clusters. In this paper, we design and implement a OpenSHMEM API based on PCI Express maintaining the existing features of OpenSHMEM to implement RDMA based on PCI Express. We perform experiment with implemented OpenSHMEM API through a matrix multiplication example from system which PCs connected with NTB(non-transparent bridge) technology of PCI Express. The PCI Express interconnection network is currently very expensive and is not yet widely available to the general public. Nevertheless, we actually implemented and evaluated a PCI Express based interconnection network on the RDK evaluation board. In addition, we have implemented the OpenSHMEM software stack, which is of great interest recently.

• Journal of Korean Society of Transportation
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• v.33 no.6
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• pp.584-597
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• 2015

A considerable amount of literature has been published on pedestrian LOS. So far, however, there is a limitation that LOS analysis methodologies has concentrated on quantitative variables such as pedestrian flow rate, speed and space. This paper intended to suggest the accessibility variable which can not be considered on previous study. The factor was defined and quantified using public transport attributes in particular. This study was carried out in three phases: 1. defined accessibility employing public mode location and service information. 2. investigated the relationship between accessibility and pedestrian flow rate 3. developed the model to establish the factors affected to pedestrian LOS. The results showed that accessibility, walkway attribute and land use type affected the pedestrian LOS. Especially, accessibility and commercial area ratio had negative relationship with LOS. Futhermore, pedestrian LOS declined when obstacle of bus station located on the walkway. On the contrary, LOS was upgraded when sufficient effective width or residential area was secured. These results can receive considerable critical attentions related to determination of pedestrian LOS or effective walkway width.

• Journal of Aerospace System Engineering
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• v.13 no.3
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• pp.78-86
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• 2019

This paper describes the stiffness optimization of the torsion spring hinge of the large SAR antenna considering the deployment performance. A large SAR antenna is folded in a launch environment and then unfolded when performing a mission in orbit. Under these conditions, it is very important to find the proper stiffness of the torsion spring hinge so that the antenna panels can be deployed with minimal impact in a given time. If the torsion spring stiffness is high, a large impact load at the time of full deployment damages the structure. If it is weak, it cannot guarantee full deployment due to the deployment resistance. A multi-body dynamics analysis model was developed to solve this problem using RecurDyn and the development performance were predicted in terms of: development time, latching force, and torque margin through deployment analysis. In order to find the optimum torsion spring stiffness, the deployment performance was approximated by the response surface method (RSM) and the optimal design was performed to derive the appropriate stiffness value of the rotating springs.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• Journal of Plant Biotechnology
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• v.35 no.3
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• pp.203-208
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• 2008

In order to micropropagate uniform plantlets of Philodendron cannifolium in vitro, the shoot tips were cultured on MS media supplemented with $0.5{\sim}10.0$ mg/L BA or $0.05{\sim}0.1$ mg/L thidiazuron(TDZ). The adventitious multi-bud clusters from basal part of shoots were formed on MS media containing $2.0{\sim}5.0$ mg/L BA or $0.05{\sim}0.1$ mg/L TDZ. But the shoots grown on MS media with TDZ showed necrosis by the lack of chlorophyll. The adventitious multi-bus clusters were cut into $5{\sim}7$ mm sections and cultured on MS media containing BA and TDZ for shoot proliferation. Shoots were proliferated vigorously on MS medium supplemented with $1.0{\sim}3.0$ mg/L BA with up to 30 shoots. But abnormally swollen hard calli were formed from basal parts of shoots on MS media with TDZ and high concentration of BA(10.0 mg/L). The proliferated shoots on same media also showed necrosis by the lack of chlorophyll. The shoot growth and rooting were favorable on MS media containing $0.5{\sim}2.0$ mg/L IBA. The rooted plantlets were acclimatizated effectively in soil mixed with perlite 1:vermiculite 1 or vermiculite alone. Fifteen mL of liquid medium containing 10 g/L activated charcoal and 30 g/L sucrose were added in same vessels after small shoots were proliferated to stimulate shoot growth and rooting. After 8 weeks in culture, the shoots were dipped into high concentration of IBA solution. and planted in soil mexed with perlite 1:vermiculite 1. The shoot growth and rooting were favorable in dipping treatments of $500{\sim}2,000$ ppm IBA solutions for 10 sec.

• Journal of Korean Society of Transportation
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• v.32 no.3
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• pp.187-197
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• 2014

The objective of this study is to analyze the travel behaviors of customers accessing to three different types of shopping facilities - traditional markets(TM), hyper markets(HM), and super supermarkets(SSM) - and also to find out the most desirable location for each type of shopping facilities that encourage sustainable transportation and smart urban growth. It also demonstrates what mode has the highest percentage of modal split and what is the access distance for public transport mode by each shopping facilities (SSM: 84.5% walking and 667m, TM: 20.1% bus and 1.6km, HM : 46.2% private car and 4.2km). Among TM, HM, and SSM, statistically significant differences are found in terms of mode choices and other associated travel behaviors. The research findings are expected to contribute to finding future urban planning and transportation solutions that promote walking and public transit uses for shopping trips and thus help support green transportation and sustainable urban growth.