• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.859-862
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• 2003

This paper proposes an emulation environment for SoC designs using small number of large gate-count FPGA's and a PC system. To overcome the pin limitation problem in partitioning the design when the design size overwhelms the FPGA gate count, we use bus splitter modules that replicate on-chip bus signals in one FPGA to arbitrary number of other FPGA's with minimal pin count. The proposed scheme is applied to the emulation of 2 million gate multimedia processing chip using two Xilinx Viretex-2 6000 FPGA devices in 6.6MHz operating frequency. An ARM core, memories, camera and LCD display are modeled in software using dual 2GHz Pentium-III processors. This scheme can be utilized for more than 2 FPGA's in the same ways as two FPGA case without losing emulation speed.

• Transactions of the Korean Society of Automotive Engineers
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• v.6 no.4
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• pp.160-165
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• 1998

In this paper, We discuss the directional stability of a Mini-bus with varying suspension design parameters. We analyzed the vehicle behavior during the cornering in a transient steering condition. We made a vehicle model by use of DADS, which is dynamic analysis software, in order to carry out many cases of simulation with varying design parameters. The effect of toe-geometry change to vehicle stability is evaluated by computer simulation and the actual test. In order to reduce the under steer characteristics of a mini-bus, the amount of toe geometry change should be less than current value.

• Proceedings of the KIPE Conference
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• 2019.11a
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• pp.144-145
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• 2019

This paper proposes a design and analysis for a PI-IP hybrid voltage controller with a combination of PI and IP voltage controller for stable voltage control of DC bus voltage, Transient characteristic of DC bus voltage is improved by designed setting variable value and control method in the variable load and power generation conditions.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1060-1062
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• 2003

In this study, an insulation design program which can calculate electric field of the GIS bus parts easily was developed. It also can evaluate the insulation safety depending on gas density. For bus parts of $1{\varphi}$ GIS, it was intended to provide a optimal diameter of a conductor and an enclosure automatically for the convenience of GIS insulation designer. This program was coded by Visual Basic and electric field was calculated by the Charge Simulation Method(CSM), which is one of the most accurate method for an electric field analysis.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1438-1440
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• 2005

A power control and distribution unit(PCDU) plays roles of protection of battery against overcharge by active control of solar array generated power, distribution of unregulated electrical power via controlled outlets to bus and instrument units, distribution of regulated electrical power to selected bus and instrument units, and provision of status monitoring and telecommand interface allowing the system and ground operate the power system, evaluate its performance and initiate appropriate countermeasures in case of abnormal conditions. In this work, we perform the preliminary design of a PCDU scheme for the small LEO Satellite applications. The main constitutes of the PCDU are the battery interface module, the auxiliary supply modules, solar array regulators with maximum power point tracking(MPPT) technology, heater power distribution modules, internal converter modules for regulated bus voltage generation. and instrument power distribution modules.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.12
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• pp.35-44
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• 2005

SoC(systnn-on-a-chip) requires high bandwidth system bus for performing multiple functions. Performance of the system is affected by bandwidth of the system bus. In this paper, for efficient management of the bus resource on a SoC platform, we present a latency model of the shared bus organized by multiple layers. Using the latency model, we can analyze latencies of the shared bus on a SoC. Moreover we evaluate a throughput of the bus and compare with needed throughput of the SoC platform including IPs such as MPEG or USB 2.0. And we can use the results as a criteria to find out an optimal bus architecture for the specific SoC design. For verifying accuracy of the proposed model, we compared the latencies with the simulation result from MaxSim tools. As the result of simulation, the accuracy of the IS model for a single layer and multiple layer are over $96\%\;and\;85\%$ respectively.

• The Journal of the Korea Contents Association
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• v.15 no.1
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• pp.95-104
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• 2015

Due to its intrinsic characteristic, exterior bus advertising is exposed to an unspecified number of the general public. Thus it influences on the urban publicness of the city, simply beyond leaving it as a personal marketing activity toward the industry's profit. Seoul city's campaign to improve exterior bus advertising has been to effective in removing advertisements of alcohols, tobaccos, and lascivious contents, however, there still are several advertisements that should be examined from the view point of publicness. For the case of UK, where exterior bus advertising is also actively utilizing owing to its high exposure and effectiveness, they are administrating it by setting up guidelines and regarding the importance of publicness. I also identified the meaning of publicness of exterior bus advertising from the aspects of 'publicness of territories', 'publicness of subjects', 'publicness of reasoning', and 'publicness of procedures'. Through this, I suggested that both commercial right of exterior bus advertising in the private sector and citizen's right of publicness can be harmoniously developed by properly controlling and administrating the exterior bus advertising. Furthermore, artistic approach to the exterior bus advertising from the viewpoint of city environment is expected to elevate the aesthetic possession and the level of design sense of citizens.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.69-78
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• 2010

To implement the high performance SoC, we propose the flying master bus architecture that a specially defined master named as the flying master directly accesses the selected slaves with no regard to the bus protocol. The proposed bus architecture was implemented through Verilog and mapped the design into Hynix 0.18um technology. As master and slave wrappers have around 150 logic gate counts, the area overhead is still small considering the typical area of modules in SoC designs. In TLM performance simulation about proposed architecture, 25~40% of transaction cycle and 43~60% of bus efficiency are increased and 43~77% of request cycle is decreased, compared with conventional bus architecture. Conclusively, we assume that the proposed flying master bus architecture is promising as the leading candidate of the bus architecture in the aspect of performance and efficiency.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.3
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• pp.216-220
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• 2013

The rated voltage has been rising in order to minimize the losses in power transmission. The high voltage electric machines should be minimized due to the constraints of space. Therefore, the temperature of high voltage electric apparatuses easily exceeds the temperature limits. In this paper, it is investigated that how to minimize the internal temperature rising of a high voltage switchgear by adjusting the arrangement of bus bars. High voltage switchgears consist of a circuit breaker, a CT, a PT, a earthing switches, bus bars, and so on. It is very difficult to estimate the electromagnetic properties of a high voltage switchgear due to these various environments and structures. In this paper, analyses are focused on the electromagnetic characteristics of bus bars according to the arrangement method and the enclosures to simplify the electromagnetic characteristics of a switchgear. It is found that the characteristics of electric field intensity and electromagnetic losses in bus bars are influenced by the arrangement method of bus bars. However, it is confirmed that the electromagnetic characteristics of enclosures are not affected by the arrangement of bus bars. In this paper, the arrangement methods of bus bars to minimize the electric field intensity and electromagnetic losses are suggested. It is expected that the research results are helpful to design and develop an electrically reliable high voltage switchgear.

• Transactions of the Korean Society of Automotive Engineers
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• v.15 no.6
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• pp.50-61
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• 2007

The structural stiffness, strength and stability on the bodyshell and floor structures of the Korean Low Floor Bus composed of laminate, sandwich panels and metal reinforced frame were evaluated. The laminate composite panel and facesheet of sandwich panel were made of WR580/NF4000 glass fabric/epoxy laminate, while aluminum honeycomb or balsa was applied to the core materials of the sandwich panel. A finite element analysis was used to verify the basic design requirements of the bodyshell and the floor structure. The use of aluminum reinforced frame and honeycomb core was beneficial for weight saving and structural performance. The symmetry of the outer and inner facesheet thickness of sandwich panels did not affect the structural integrity. The structural strength of the panels was evaluated using Von-Mises criterion for metal structures and total laminate approach criterion for composite structures. All stress component of the bodyshell and floor structures were safely located below the failure stresses. The total laminate approach is recommended to predict the failure of hybrid sandwich composite structures at the stage of the basic design.