• Title/Summary/Keyword: Bulk Carrier

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Process and Structure Design for High Power Reverse-Conducting Gate Commutated Thyristors (RC- GCTs) (고전압 역도통 Gate Commutated Thyristor (RC-GCT) 소자의 공정 및 구조 설계)

  • Kim, Sang-Cheol;Kim, Eun-Dong;Zhang, Chang-Li;Kim, Nam-Kyun;Baek, Do-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.1096-1099
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    • 2001
  • The basic design structure of RC-GCTs (Reserve-Conducting Gate-Commutated Thyristors) is firstly given in this paper. The bulk of wafer is punch-through (PT) type with high resistivity and narrow N-base width. The photo-mask was designed upon the turn-off characteristics of GCT and solution of separation between GCT and diode part. The center part of Si wafer is free-wheeling diode (FWD) and outer is GCT part which has 240 fingers totally. The switching performance of GCT was investigated by Dessis of ISE. The basic manufacture process of 2500V-4500V RC-GCTs was given in this work. Additionally, the local carrier lifetime control by 5Mev proton irradiation was adopted so as to not only to have the softness of reverse recovering for FWD but for reduction of turn-off losses of GCT as well.

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Full Scale Frictional Resistance Reduction Effect of a Low Frictional Marine Anti-fouling Paint based on a Similarity Scaling Method (상사축척법에 기반한 저마찰 선박 방오도료의 실선 마찰저항 저감성능 추정)

  • Yang, Jeong Woo;Park, Hyun;Lee, Inwon
    • Journal of the Society of Naval Architects of Korea
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    • v.54 no.1
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    • pp.71-81
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    • 2017
  • In this study, a series of full-scale extrapolation procedures based on the Granville's similarity scaling method, which was employed by Schultz (2007), is modified and then applied to compare the resistance performance between two different anti-fouling coatings. As an analysis example, the low frictional AF coating based on a novel skin-friction reducing polymer named FDR-SPC (Frictional Drag Reduction Self-Polishing Copolymer), which had been invented by the present author, is employed. The low frictional coating, which gives 25.4% skin frictional reduction in lab test, is estimated to give 18.2% total resistance reduction for a 176k DWT bulk carrier.

AC Conductivity of $(Sr_{0.75}$,$La_{0.25}$) $TiO_3/SrTiO_3$ Superlattices

  • Choe, Ui-Yeong;Choe, Jae-Du;Lee, Jae-Chan
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.05a
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    • pp.31.2-31.2
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    • 2011
  • We have investigated frequency dependant conductivity (or permittivity) of low dimensional oxide structures represented by [($Sr_{0.75}$, $La_{0.25}$)$TiO_3$]$_1$/1$[SrTiO_3]_n$ superlattices. The low dimensional oxide superlattice was made by cumulative stacking of one unit cell thick La doped $SrTiO_3$ and $SrTiO_3$ with variable thickness from 1 to 6 unit cell, i,e, [($Sr_{0.75}$, $La_{0.25}$)$TiO_3$]$_1$/$[SrTiO_3]_n$ (n=1, 2, 3, 4, 5, 6). We found two kinds of relaxation when n is 3 and 4, while, inductance component was observed at n=1. This behavior can be explained by electron modulation in ($Sr_{0.75}$, $La_{0.25}$)$TiO_3/SrTiO_3$ superlattices. When n is 1, electrons by La doping well extend to un-doped layer. Therefore, the transport of superlattices follows bulk-like behavior. On the other hand, as n increased, the doped electrons became two types of carrier: one localized and the other extended. These results in two kinds of transport phase. At further increase of n, most of doped electrons are localized at the doped layer. This result shows that dimensionality of the oxide structure significantly affect the transport of oxide nanostructures.

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Analysis of temperature effects on DC parameters of AlGaAs/GaAs HBT (AlGaAs/GaAs HBT의 DC 파라미터에 미치는 온도영향의 해석)

  • 김득영;박재홍;송정근
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.12
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    • pp.39-46
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    • 1996
  • In AlGaAs/GaAs HBT the temperature dependence of DC parameters was investigated over the temperature range between 95K and 580K. The temperature dependence of DC parameters depends on the relative contribution of each of the current components suc as emitter-injection-current, base-injection-current, bulk recombination current, interface recombination curretn, thermal generation ecurrent and avalanche current due to impact ionization within the collector space charge layer in a specific temperature. In this paper we investigated the temperature effects on DC parameters such as V$_{BE,ON}$ current gain, input and output characteristics, V$_{CE, OFF}$, R$_{E}$, R$_{C}$ and analyzed the origins, and extracted the qualitativ econditions for a stable HBTs against the temperature variation. Finally, in order to keep HBTs stable with respect to the variation of temperature, the valance-band-energy-discontinuity at emitter-base heterojunction should be large enough to enhance the effect of carrier suppression at a relatively high temperature. In addition the recombination centers, especially around collector junction, should be removed and the area of emitter and collector junction should be identical as well.

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The optimum design of InGaAsP/InP RWG MQW-LD (InGaAsP/InP RWG MQW-LD의 최적 설계)

  • 하홍춘;오수환;이석정;박윤호;오종환;홍창희
    • Korean Journal of Optics and Photonics
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    • v.7 no.4
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    • pp.375-385
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    • 1996
  • Recently interest in the fabrication of LD operated by low current is gradually increasing as fabrication techniques of MQW-LD are progressed. In this viewpoint, theoretical estimation for decreasing the amount of threshold current will be helpful to design and make LD in case that active layer of conventional bulk type RWG-LD structure is replaced with MQW structure. Therefore, the optimum design condition of RWG MQW-LD was obtained from theoretical analysis in order to operate in the weakly index-guided LD and low threshold current. The lateral effective index step has been obtained in RWG MQW-LD structure. Waveguide mechanism including this index step has been investigated by solving the carrier diffusion equation and lateral wave equation. From these theoretical results, the optimum design condition of RWG MQW-LD have been suggested.

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The Real Role of 4,4'-Bis[N-[4-{N,N-bis(3-methylphenyl)amino}phenyl]-N-phenylamino] biphenyl (DNTPD) Hole Injection Layer in OLED: Hole Retardation and Carrier Balancing

  • Oh, Hyoung-Yun;Yoo, Insun;Lee, Young Mi;Kim, Jeong Won;Yi, Yeonjin;Lee, Seonghoon
    • Bulletin of the Korean Chemical Society
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    • v.35 no.3
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    • pp.929-932
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    • 2014
  • We explored interfacial electronic structures in indium tin oxide (ITO)/DNTPD/N,N'-diphenyl-N,N'-bis(1-naphthyl)-1,1'-biphenyl-4,4'-diamine (NPB) layer stack in an OLED to clarify the real role of an aromatic amine-based hole injection layer, DNTPD. A hole injection barrier at the ITO/DNTPD interface is lowered by 0.20 eV but a new hole barrier of 0.36 eV at the DNTPD/NPB is created. The new barrier at the DNTPD/NPB interface and its higher bulk resistance serve as hole retardation, and thus those cause the operation voltage for the ITO/DNTPD/NPB to increase. However, it improves current efficiency through balancing holes and electrons in the emitting layer.

A Feasibility Review for an Uneven Baseline Basis Minimal Ballast Ship

  • Kang, Hee Jin;Kim, Kwang-Soo;Choi, Jin;Lee, Yeong-Yeon;Ahn, Haeseong;Yim, Geun-Tae
    • Journal of Ocean Engineering and Technology
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    • v.34 no.1
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    • pp.1-12
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    • 2020
  • Although there are many kinds of advanced ballast water management systems, pioneering studies for ballast-water free ship and minimal ballast water ship concepts are in progress. In this study, the existing alternatives of ballast water are reviewed and a new design concept is studied on the basis of the existing bulk carrier hull form. To develop a new design alternative which has minimal ballast for ballast water discharge free operation, the new concept should have technical feasibilities that are related to the role of the ballast water, berth access, loading constraints, etc. For this purpose, a simplified systems engineering basis design approach is adopted using a business model as the system analysis and control tool. To check the performance feasibility of the new concept, ship resistance performance is reviewed based on a model scale ship resistance performance analysis.

Synthesis of Submicron $SrTiO_3$ Powders by Wet Process (습식법에 의한 초미립 $SrTiO_3$ 분말 합성)

  • 박종옥;최의석;이철효;이종민
    • Journal of the Korean Ceramic Society
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    • v.23 no.2
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    • pp.21-30
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    • 1986
  • Pure submicron $SrTiO_3$ powders had been synthesized with chemical wet process that $5N-NH_4OH$ solution was sprayed into the mixed solution of $SrTiO_3$, $TiCl_4$ and $H_2O_2$ with $N_2$ carrier gas. The characteristic properties of powders obtained from this experiment were as follows. The optimum synthesis condition in reaction bath was above PH 8.5 and under $25^{\circ}C$ The particle size of precipitated SrTiO(OH) powders dried at 6$0^{\circ}C$ was under 0.01${\mu}{\textrm}{m}$ and uniform. Amorphous precipitated complex powders emitted adsorbed water at 15$0^{\circ}C$ less that and crystalline $SrTiO_3$powders was produced from calcining the complex at 30$0^{\circ}C$. Sintered body of SrTiO3 fired at 133$0^{\circ}C$ showed that relative dielectric constant was 228 at 1MHZ and bulk density was 4.73g/$cm^3$.

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Ge thin layer transfer on Si substrate for the photovoltaic applications (Si 기판에서의 광소자 응용을 위한 Ge 박막의 Transfer 기술개발)

  • 안창근;조원주;임기주;오지훈;양종헌;백인복;이성재
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.743-746
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    • 2003
  • We have successfully used hydrophobic direct-wafer bonding, along with H-induced layer splitting of Ge, to transfer 700nm think, single-crystal Ge films to Si substrates. Optical and electrical properties have been also observed on these samples. Triple-junction solar cell structures gown on these Ge/Si heterostructure templates show comparable photoluminescence intensity and minority carrier lifetime to a control structure grown on bulk Ge. When heavily doped p$^{+}$Ge/p$^{+}$Si wafer bonded heterostructures were bonded, ohmic interfacial properties with less than 0.3Ω$\textrm{cm}^2$ specific resistance were observed indicating low loss thermal emission and tunneling processes over and through the potential barrier. Current-voltage (I-V) characteristics in p$^{+}$Ge/pSi structures show rectifying properties for room temperature bonded structures. After annealing at 40$0^{\circ}C$, the potential barrier was reduced and the barrier height no longer blocks current flow under bias. From these observations, interfacial atomic bonding structures of hydrophobically wafer bonded Ge/Si heterostructures are suggested.ested.

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Quantum Modeling of Nanoscale Symmetric Double-Gate InAlAs/InGaAs/InP HEMT

  • Verma, Neha;Gupta, Mridula;Gupta, R.S.;Jogi, Jyotika
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.4
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    • pp.342-354
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    • 2013
  • The aim of this work is to investigate and study the quantum effects in the modeling of nanoscale symmetric double-gate InAlAs/InGaAs/InP HEMT (High Electron Mobility Transistor). In order to do so, the carrier concentration in InGaAs channel at gate lengths ($L_g$) 100 nm and 50 nm, are modelled by a density gradient model or quantum moments model. The simulated results obtained from the quantum moments model are compared with the available experimental results to show the accuracy and also with a semi-classical model to show the need for quantum modeling. Quantum modeling shows major variation in electron concentration profiles and affects the device characteristics. The two triangular quantum wells predicted by the semi-classical model seem to vanish in the quantum model as bulk inversion takes place. The quantum effects thus become essential to incorporate in nanoscale heterostructure device modeling.