• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.5
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• pp.30-36
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• 2012

A new BIST(Built-In Self-Test) scheme to test ADC(Analog-to-Digital Converter) with a transition detector is proposed. The proposed BIST is able to replaces histogram method, the most popular approach in static testing of ADC. With a ramp signal as an input test stimulus, the proposed BIST calculates ADC's static parameters such as offset, gain, INL(Integral Non-Linearity) and DNL(Differential Non-Linearity). The three detectors in the proposed BIST can deal with a transient zone problem, a phenomenon due to random noise in real test environments and are cost efficient at various acceptable ranges determined as a test spec. The simulation results validate that our method performs accurate static test and show the reduction of the hardware overhead.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.72-82
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• 2014

Recently, the size of semiconductor industry market is constantly growing, due to the increase in diffusion of smart-phone, tablet PC and SSD(Solid State Drive). Also, it is expected that the demand for TLC NAND-type flash memory would gradually increase, with the recent release of TLC NAND-type flash memory in the SSD market. There have been a lot of studies on SLC NAND flash memory, but no research on TLC NAND flash memory has been conducted, yet. Also, a test of NAND-type flash memory is depending on a high-priced external equipment. Therefore, this study aims to suggest a structure for an autonomous test with no high-priced external test device by modifying the existing SLC NAND flash memory and MLC NAND flash memory test algorithms and patterns and applying them to TLC NAND flash memory.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.995-998
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• 2005

This paper proposes a new SoC (System-on-Chip)-based automatic compensation circuit (ACC) for 5GHz low noise amplifier (LNA). This circuit is extremely useful for today's RF IC (Radio Frequency Integrated Circuit) devices in a complete RF transceiver environment. The circuit contains RF BIST (Built-ln Self-Test) circuit, Capacitor Mirror Banks (CMB) and digital processing unit (DPU). The ACC automatically adjusts performance of 5GHz LNA by the processor in the SoC transceiver when the LNA goes out of the normal range of operation.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.6 s.336
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• pp.1-8
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• 2005

This paper presents a new low-cost fault-based Built-In Self-Test (BIST) scheme and technique for 1.8GHz RF receiver front end. The technique utilizes input impedance matching measurement. The BIST block and RF receiver front end are designed using 0.25m CMOS technology on a single chip. The technique is simple and inexpensive. The overhead of the BIST circuit is approximately $10\%$ of the total area of the RF front end.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.43-48
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• 2008

Power consumption during test can be much higher than that during normal operation since test vectors are determined independently. In order to reduce the power consumption during test process, a new BIST(Built-In Self Test) architecture is proposed. In the proposed architecture, test vectors generated by an LFSR(Linear Feedback Shift Resister) are transformed into the new patterns with low transitions using Bit Generator and Bit Dropper. Experiments performed on ISCAS'89 benchmark circuits show that transition reduction during scan testing can be achieved by 62% without loss of fault coverage. Therefore the new architecture is a viable solution for reducing both peak and average power consumption.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.3
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• pp.61-71
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• 2014

As the occupancy rate of the flash memory increases in the storage media market for the embedded system and the semi-conductor industry grows, the demand and supply of flash memory is increasing by a big margin. They are especially used in large quantity in the smart phones, tablets, PC, SSD and Soc(System on Chip) etc. The flash memory is divided into the NOR type and NAND type according to the cell arrangement structure and the NAND type is divided into the SLC(Single Level Cell) and MLC(Multi Level Cell) according to the number of bits that can be stored in each cell. Many tests have been performed on NOR type such as BIST(Bulit-In Self Test) and BIRA(Bulit-In Redundancy Analysis) etc, but there is little study on the NAND type. For the case of the existing BIST, the test can be proceeded using external equipments like ATE of high price. However, this paper is an attempt for the improvement of credibility and harvest rate of the system by proposing the BIST for the MLC NAND type flash memory of Finite State Machine structure on which the pattern test can be performed without external equipment since the necessary patterns are embedded in the interior and which uses the MLC NAND March(x) algorithm and pattern which had been proposed for the MLC NAND type flash memory.

• Nuclear Engineering and Technology
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• v.53 no.7
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• pp.2251-2260
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• 2021

The motion control of the divertor maintenance system of the China Fusion Engineering Test Reactor (CFETR) was studied in this paper, in which CFETR Multi-Functional Maintenance Platform (MFMP) was simplified as a parallel robot for the convenience of theoretical analysis. In order to design the motion controller of parallel robot, the kinematics analysis of parallel robot was carried out. After that, the dynamic modeling of the hydraulic system was built. As the large variation of heavy payload on MFMP and highly nonlinearity of the system, A Fuzzy-PID controller was built for self-tuning PID controller parameters by using Fuzzy system to achieve better performance. In order to test the feasibility of the Fuzzy-PID controller, the simulation model of the system was built in Simulink. The results have showed that Fuzzy-PID controller can significantly reduce the angular error of the moving platform and provide the stable motion for transferring the divertor.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.8 s.350
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• pp.27-34
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• 2006

During Built-In Self-Test(BIST), The set of patterns generated by a pseudo-random pattern generator may not provide sufficiently high fault coverage and many patterns were undetected fault. In order to reduce the test time, we can remove useless patterns or change from them to useful patterns. In this paper, we reseed modify the pseudo-random and use an additional bit flag to improve test length and achieve high fault coverage. the fat that a random tset set contains useless patterns, so we present a technique, including both reseeding and bit modifying to remove useless patterns or change from them to useful patterns, and when the patterns change, we choose number of different less bit, leading to very short test length. the technique we present is applicable for single-stuck-at faults. the seeds we use are deterministic so 100% faults coverage can be achieve.

• Computers and Concrete
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• v.32 no.3
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• pp.339-349
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• 2023

Fast-built construction is a key feature for successful applications of precast concrete (PC) moment frame system in recent construction practices. To this end, by introducing some unique splicing details in precast connections, especially between PC columns including panel zones, use of temporary supports and bracings can be minimized based on their self-sustaining nature. In addition, precast wide beams are commonly adopted for better economic feasibility. In this study, three self-sustaining precast concrete (PC) wide beam-column connection specimens were fabricated and tested under reversed cyclic loadings, and their seismic performances were quantitatively evaluated in terms of strength, ductility, failure modes, energy dissipation and stiffness degradation. Test results were compared with ASCE 41-17 nonlinear modeling curves and its corresponding acceptance criteria. On this basis, an improved macro modeling method was explored for a more accurate simulation. It appeared that all the test specimens fully satisfy the acceptance criteria, but the implicit joint model recommended in ASCE 41-17 tends to underestimate the joint shear stiffness of PC wide beam-column connection. While, the explicit joint model along with concentrated plastic hinge modeling technique is able to present better accuracy in simulating the cyclic responses of PC wide beam-column connections.

• The Korean Journal of Elementary Counseling
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• v.5 no.1
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• pp.43-63
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• 2006

This study aims at examining effects of study skills training on elementary school children's self-directed learning ability. To achieve this goal, the following hypotheses were built. Hypothesis 1. There are significant differences in self-directed learning ability between experimental and control groups. Hypothesis 2. There are significant differences in study skills by self-directed learning ability in the experimental group. To test these hypotheses, two classes in the fourth grade were selected from S Elementary School in the city of Busan for experimental and control groups, each of which consisted of 23 children: seven for the advanced group, eight for the intermediate group, and eight for the lower group according to self-directed learning ability. The experimental group participated in twenty sessions of study skills training while the control group went through no treatment. The study skills training program was the reconstruction to meet the requirements of this study in reference to domestic study skills training programs on the basis of the Study Skills Training Program for Elementary School Children in the Higher Grades developed by Byeon and others (2001), The effects of the program was tested by using the Study Skills Test for Elementary School Children in the Higher Grades developed by the educational institute of Busan National University (Bye on et al., 1999) and Lee's (1998) translation of the Self-Directed Learning Preparation Test by Guglielmino (1977) for elementary school children. To analyze the effects of the program, the SPSSWIN (10.0) program was used to carry out ANCOVA on results of pretest and post-test for experimental and control groups, along with repetitive one-way ANOVA to examine differences in results of pretest, post-test, and further test and an individual comparative test (Scheffe) to see differences in means of the three tests. This study obtained the following results. First, there were significant differences in marks for self-directed learning ability between the experimental group participating in study skills training and the control group and the effect was shown to last. Second, in terms of three levels of self-directed learning ability, there was no significant difference between advanced and intermediate groups in the effects on study skills but there were significant differences in the lower group. The results demonstrated that study skills training had a significant effect on their self-directed learning ability. and the study skills training program had a meaningful effect on the lower group.