• 제목/요약/키워드: Buck regulator

검색결과 39건 처리시간 0.025초

A Fast Response Integrated Current-Sensing Circuit for Peak-Current-Mode Buck Regulator

  • Ha, Jung-Woo;Park, Byeong-Ha;Kong, Bai-Sun;Chun, Jung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권6호
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    • pp.810-817
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    • 2014
  • An on-chip current sensor with fast response time for the peak-current-mode buck regulator is proposed. The initial operating points of the peak current sensor are determined in advance by the valley current level, which is sensed by a valley current sensor. As a result, the proposed current sensor achieves a fast response time of less than 20 ns, and a sensing accuracy of over 90%. Applying the proposed current sensor, the peak-current-mode buck regulator for the mobile application is realized with an operating frequency of 2 MHz, an output voltage of 0.8 V, a maximum load current of 500 mA, and a peak efficiency of over 83%.

Modeling and Regulator Design for Three-Input Power Systems with Decoupling Control

  • Li, Yan;Zheng, Trillion Q.;Zhao, Chuang;Chen, Jiayao
    • Journal of Power Electronics
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    • 제12권6호
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    • pp.912-924
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    • 2012
  • In hybrid renewable power systems, the use of a multiple-input dc/dc converter (MIC) leads to simpler circuit and lower cost, when compared to the conventional use of several single-input converters. This paper proposed a novel three-input buck/boost/buck-boost converter, which can be used in applications with various values of input voltage. The energy sources in this converter can deliver power to the load either simultaneously or individually in one switching period. The steady relationship, the power management strategy and the small-signal circuit model of this converter have been derived. With decoupling technology, modeling and regulator design can be obtained under multi-loop control modes. Finally, three generating methods of a multiple-input buck/boost/buck-boost converter is given, and this method can be extended to the other multiple-input dc/dc converters.

A Study on Bidirectional Boost-Buck Chopper Type AC Voltage Regulator

  • 이스난도;최우석;박성준
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 추계학술대회 논문집
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    • pp.193-194
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    • 2012
  • The bidirectional boost-buck chopper type AC voltage regulator is presented in this paper. The main characteristic of the AC chopper is the fact that it generates an output AC voltage larger or lower than the input AC one, depending of the instantaneous duty-cycle. Boost-buck chopper type AC voltage regulator, derived from the DC chopper modulated method, is a kind of direct AC-AC voltage converter and has many advantages: such as fast response speed, low harmonics and high power factor. It adopts high switching frequency AC chopper technique and can do wide range step less AC voltage regulation.

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의사-연속전류모드 벅-부스트 형 태양전력 조절기의 평균전류모드제어 (Average-Current-Mode Control of Pseudo-Continuous Current Mode BUCK-BOOST Type Solar Array Regulator)

  • 양정환;윤석택
    • 한국위성정보통신학회논문지
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    • 제7권2호
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    • pp.72-75
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    • 2012
  • 저궤도 인공위성에 사용되는 태양전력 조절기는 태양전지의 영향으로 일반적인 DC-DC 컨버터와는 다른 소신호 특성을 갖는다. 이로 인하여 벅-부스트 형 태양전력 조절기는 태양전지의 전류원 영역에서 평균전류모드제어가 불가능하다. 이 논문에서는 벅-부스트 형 태양전력 조절기를 의사-연속전류모드로 동작시켜 태양전지의 전 영역에서 태양전력조절기를 평균전류모드 단일 제어한다. 우선 의사-연속전류모드 벅-부스트 형 태양전력 조절기의 회로 동작을 설명하고, 소신호 전달함수를 구하고 이를 바탕으로 평균전류모드제어기를 구성한다. 최종적으로 모의실험을 통하여 의사-연속전류모드 벅-부스트 형 태양전력 조절기의 평균모드제어를 검증한다.

A Driving Scheme Using a Single Control Signal for a ZVT Voltage Driven Synchronous Buck Converter

  • Asghari, Amin;Farzanehfard, Hosein
    • Journal of Power Electronics
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    • 제14권2호
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    • pp.217-225
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    • 2014
  • This paper deals with the optimization of the driving techniques for the ZVT synchronous buck converter proposed in [1]. Two new gate drive circuits are proposed to allow this converter to operate by only one control signal as a 12V voltage regulator module (VRM). Voltage-driven method is applied for the synchronous rectifier. In addition, the control signal drives the main and auxiliary switches by one driving circuit. Both of the circuits are supplied by the input voltage. As a result, no supply voltage is required. This approach decreases both the complexity and cost in converter hardware implementation and is suitable for practical applications. In addition, the proposed SR driving scheme can also be used for many high frequency resonant converters and some high frequency discontinuous current mode PWM circuits. The ZVT synchronous buck converter with new gate drive circuits is analyzed and the presented experimental results confirm the theoretical analysis.

An Optimized Stacked Driver for Synchronous Buck Converter

  • Lee, Dong-Keon;Lee, Sung-Chul;Jeong, Hang-Geun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권2호
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    • pp.186-192
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    • 2012
  • Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.

Output Noise Reduction Technique Based on Frequency Hopping in a DC-DC Converter for BLE Applications

  • Park, Ju-Hyun;Kim, Sung Jin;Lee, Joo Young;Park, Sang Hyeon;Lee, Ju Ri;Kim, Sang Yun;Kim, Hong Jin;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • 제4권5호
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    • pp.371-378
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    • 2015
  • In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

DSP를 이용한 Synchronous Buck Converter의 병렬 제어 (Parallel Control of Synchronous Buck Converter Using DSP)

  • 김정훈;임정규;신휘범;정세교;이현우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2006년도 전력전자학술대회 논문집
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    • pp.140-142
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    • 2006
  • This paper represents a digital parallel control of a synchronous buck converter using a digital signal processor (DSP). The digital PWM and load sharing controller is implemented in the DSP TMS320F2812 and the experimental results are provided to show the feasibility of the digital synchronous buck regulator.

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3상 PWM Buck AC-AC 컨버터의 특성해석과 제어 (Characteristic Analysis and Control of Three Phase PWM Buck AC-AC Converter)

  • 최남섭
    • 한국정보통신학회논문지
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    • 제7권6호
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    • pp.1283-1290
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    • 2003
  • PWM Buck AC-AC 컨버터는 최근 들어 전압 또는 전력 레귤레이터, 전자식 변압기, 위상 천이기와 같은 산업현장의 다양한 응용분야에 폭넓게 사용되고 있다. 본 논문에서는 이러한 PWM Buck AC-AC 컨버터의 정적 및 동적 모델링과 완전한 특성 해석을 제시한다. 먼저, 3상의 컨버터 시스템은 DQ 변환 기법에 의하여 모델링 되고 그에 따라 전압이득과 역률과 같은 기본적인 특성식을 구하고 제어를 위한 시스템의 상태 방정식과 전달함수를 구한다. 다음으로, 이러한 해석에 기초하여 매우 빠른 동적 응답을 갖도록 순시적인 듀티 변동이 가능한 feedforward-feedback 제어기법을 제안한다. 끝으로, 실험결과를 통하여 이러한 모델링과 해석 및 제어가 유효함을 확인할 수 있다.

저궤도 인공위성용 태양전력 조절기의 전류 불연속 모드 해석 (DCM Analysis of Solar Array Regulator for LEO Satellites)

  • 박희성;차한주
    • 전기학회논문지
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    • 제65권4호
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    • pp.593-600
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    • 2016
  • The solar array regulator for low earth orbit satellites controls a operating point of solar array for suppling electric power to the battery and the other units. Because the control object is reversed, the new approach for large and small signal analysis is needed despite using buck-converter for power stage. In this paper, the steady state analysis of solar array regulator is performed in continuous conduction mode and discontinuous conduction mode, and the border condition for each mode is established. Also, the small signal model of solar array regulator is established in discontinuous conduction mode. Experiments are carried on in worst condition which the solar array regulator can face with discontinuous conduction mode. The results show that the solar array regulator is in stable.