• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.810-817
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• 2014

An on-chip current sensor with fast response time for the peak-current-mode buck regulator is proposed. The initial operating points of the peak current sensor are determined in advance by the valley current level, which is sensed by a valley current sensor. As a result, the proposed current sensor achieves a fast response time of less than 20 ns, and a sensing accuracy of over 90%. Applying the proposed current sensor, the peak-current-mode buck regulator for the mobile application is realized with an operating frequency of 2 MHz, an output voltage of 0.8 V, a maximum load current of 500 mA, and a peak efficiency of over 83%.

• Journal of Power Electronics
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• v.12 no.6
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• pp.912-924
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• 2012

In hybrid renewable power systems, the use of a multiple-input dc/dc converter (MIC) leads to simpler circuit and lower cost, when compared to the conventional use of several single-input converters. This paper proposed a novel three-input buck/boost/buck-boost converter, which can be used in applications with various values of input voltage. The energy sources in this converter can deliver power to the load either simultaneously or individually in one switching period. The steady relationship, the power management strategy and the small-signal circuit model of this converter have been derived. With decoupling technology, modeling and regulator design can be obtained under multi-loop control modes. Finally, three generating methods of a multiple-input buck/boost/buck-boost converter is given, and this method can be extended to the other multiple-input dc/dc converters.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.193-194
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• 2012

The bidirectional boost-buck chopper type AC voltage regulator is presented in this paper. The main characteristic of the AC chopper is the fact that it generates an output AC voltage larger or lower than the input AC one, depending of the instantaneous duty-cycle. Boost-buck chopper type AC voltage regulator, derived from the DC chopper modulated method, is a kind of direct AC-AC voltage converter and has many advantages: such as fast response speed, low harmonics and high power factor. It adopts high switching frequency AC chopper technique and can do wide range step less AC voltage regulation.

• Journal of Satellite, Information and Communications
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• v.7 no.2
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• pp.72-75
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• 2012

A solar array makes a Solar Array Regulator (SAR) for Low-Earth-Orbit satellite have different small signal characteristic. Therefore, an Average-Current-Mode (ACM) controller cannot control the BUCK-BOOST type SAR which operates in a current region of the solar array. In this paper, we present the Pseudo-Continuous Current Mode (PCCM) BUCK-BOOST Type SAR which can be controller by the ACM Controller. We explain the circuit operation of the PCCM BUCK-BOOST Type SAR, derive its small signal transfer function and design ACM Controller. Finally, we verify the ACM control of the PCCM BUCK-BOOST Type SAR by using a simulation.

• Journal of Power Electronics
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• v.14 no.2
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• pp.217-225
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• 2014

This paper deals with the optimization of the driving techniques for the ZVT synchronous buck converter proposed in [1]. Two new gate drive circuits are proposed to allow this converter to operate by only one control signal as a 12V voltage regulator module (VRM). Voltage-driven method is applied for the synchronous rectifier. In addition, the control signal drives the main and auxiliary switches by one driving circuit. Both of the circuits are supplied by the input voltage. As a result, no supply voltage is required. This approach decreases both the complexity and cost in converter hardware implementation and is suitable for practical applications. In addition, the proposed SR driving scheme can also be used for many high frequency resonant converters and some high frequency discontinuous current mode PWM circuits. The ZVT synchronous buck converter with new gate drive circuits is analyzed and the presented experimental results confirm the theoretical analysis.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.186-192
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• 2012

Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.5
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• pp.371-378
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• 2015

In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.140-142
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• 2006

This paper represents a digital parallel control of a synchronous buck converter using a digital signal processor (DSP). The digital PWM and load sharing controller is implemented in the DSP TMS320F2812 and the experimental results are provided to show the feasibility of the digital synchronous buck regulator.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.6
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• pp.1283-1290
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• 2003

Recently, PWM Buck AC-AC Converter is widely employed in various industrial applications such as voltage and power regulator, electronic transformer, phase shifter and so on. This paper presents static and dynamic modeling and complete characteristic analysis of a PWM Buck AC-AC converter. Firstly, the three phase converter system is modelled by using DQ transformation whereby we can obtain basic characteristic equations such as voltage gain and power factor as well as state equation and transfer function for control. Secondly, based on the analysis, the feedforward-feedback control technique is also proposed to obtain instantaneous duty level change whereby very fast dynamic response is achieved. Finally, the experimental results show the validity of the modeling, analysis and control.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.4
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• pp.593-600
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• 2016

The solar array regulator for low earth orbit satellites controls a operating point of solar array for suppling electric power to the battery and the other units. Because the control object is reversed, the new approach for large and small signal analysis is needed despite using buck-converter for power stage. In this paper, the steady state analysis of solar array regulator is performed in continuous conduction mode and discontinuous conduction mode, and the border condition for each mode is established. Also, the small signal model of solar array regulator is established in discontinuous conduction mode. Experiments are carried on in worst condition which the solar array regulator can face with discontinuous conduction mode. The results show that the solar array regulator is in stable.