• 전력전자학회논문지
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• 제21권1호
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• pp.19-26
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• 2016

In this study, a bidirectional DC-DC converter for idle stop and go (ISG) is developed to reduce fuel consumption. A three-phase non-isolated half-bridge converter is selected through a design method by considering efficiency and volume. According to the state of charge of the batteries at both the low-voltage and high-voltage sides, buck mode, which charges a low-voltage battery from the generated motor energy, and boost mode, which provides power to the motor from the low- and high-voltage battery sides, are required in the ISG system. Hence, an autonomous and seamless bidirectional control method using a variable current limiter is proposed for mode change. A 1.8 kW engineering sample of the proposed converter has been built and tested to verify the validity of the proposed concept. The maximum efficiencies, including gate driver and control circuit losses, are 96.4% in charging mode and 96.1% in discharging mode.

• 전력전자학회논문지
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• 제16권4호
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• pp.334-341
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• 2011

본 논문은 비상전원 공급장치를 위한 넓은 입력전압 범위를 갖는 DC/DC 컨버터를 제안하고 그 설계 및 제작에 대하여 기술한다. 컨버터의 입력전압은 30V~400V이며 출력전압은 48V로, 2단 구성의 컨버터를 제안한다. 제안된 컨버터는 벅부스트 컨버터와 소프트 스위칭 특성을 갖는 LLC 공진 컨버터로 구성되며 LLC공진 컨버터는 고정주파수로 동작하며 벅부스트 컨버터에서 제어동작을 수행하여 제어를 단순화한다. 모의실험을 통해 설계된 회로를 검증하고 실제 300W급의 세트를 제작하여 그 성능을 검증한다.

• 한국정보통신학회논문지
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• 제20권9호
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• pp.1763-1770
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• 2016

본 논문에서는 넓은 출력 부하 전력에서도 동작하는 하이브리드 변환기를 제안했다. 스위치드 커패시터 변환기는 높은 부하 전력에서 효율이 낮고, 낮은 부하 전력에서는 효율이 높다. 반대로, 벅 변환기는 높은 부하 전력에서는 효율이 높고, 낮은 부하 전력에서는 효율이 낮다. 제안된 하이브리드 변환기는 스위치드 커패시터 변환기와 벅 변환기를 혼합했다. 낮은 부하 전력에서는 스위치드 커패시터 변환기를 동작시키고, 높은 부하에서는 벅 변환기를 동작시켜, 넓은 출력 부하 전력에서 전력 효율을 향상시켰다. 제안된 하이브리드 변환기는 $0.18{\mu}m$ CMOS 공정으로 구현되었다. 하이브리드 변환기의 출력 부하 전력 범위는 0.05~100mW 이며, 벅 변환기와 스위치드 커패시터 변환기에서 각각 93%와 77%의 최대 전력 효율을 가진다.

• 전자공학회논문지B
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• 제28B권5호
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• pp.421-430
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• 1991

This paper investigated the errect of the right-half-plane zero on stability in the buck-boost DC-DC converter which is one type of the switching regulator and the stability region for the variation of the output current is obtained by evaluating the feedback gain. And it is clarified that the damping ratio decreases gradually by increase of the feedback loop gain and the regulation system of the converter becomes unstable, and from the transient response analysis we obtainedthe stability region about this converter. From above result it is known that the stability decreases by the existence of the right-half-plane zero. For the improvement of stability, we carried out one pole compensation in feedback circuit and obtained the avaliable stability region in relation to the gain bandwidth product from the stability and transient response analysis. These results were established experiment.

• 한국전자파학회논문지
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• 제28권4호
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• pp.298-308
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• 2017

본 논문에서는 DC-DC Converter에서의 고조파로 인한 전자기적 잡음을 줄이기 위해 Random PWM을 적용한 Interleaved Buck Converter(IBC) 시스템을 제안한다. PWM 직류전원장치에서 스위칭 방식을 사용하는 경우 스위칭 손실 및 EMI 문제가 발생하기 때문에 많은 고조파를 포함하고 있어 선간 전압의 왜곡 등을 유발한다. 따라서 이에 대한 해결방법으로 PRBS를 이용한 IBC를 최초로 제안한다. 이 방식의 회로 구조는 2개의 능동형 스위치를 가지며 180도의 위상차를 갖는 2개의 PWM 신호를 이용하여 회로를 제어한다. IBC는 1세트의 스위치를 추가하기 때문에, 비용 측면 등에서는 불리 할 수 있으나 전력분배, 출력전류 리플 감소, 빠른 회로 반응속도, 수동소자크기 감소의 이점을 가진다. 본연구의 타당성을 확인하기 위하여 PSIM 시뮬레이터를 이용하였고 Random PWM을 적용한 IBC 회로를 설계하여 기존의 PWM과 RPWM 방식만을 사용하는 Buck-converter 회로를 PSIM 시뮬레이터를 이용하여 결과를 확인하고 분석하였다.

• Journal of Power Electronics
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• 제13권6호
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• pp.1008-1015
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• 2013

By using fractional calculus and the circuit-averaging technique, the modeling and analysis of a Buck converter with fractional order inductor and fractional order capacitor in discontinuous conduction mode (DCM) operations is investigated in this study. The equivalent averaged circuit model of the fractional order Buck converter in DCM operations is established. DC analysis is conducted by using the derived DC equivalent circuit model. The transfer functions from the input voltage to the output voltage, the duty cycle to the output voltage, the input impedance, and the output impedance of the fractional order Buck converter in DCM operations are derived from the corresponding AC-equivalent circuit model. Results show that the DC equilibrium point, voltage ratio, and all derived transfer functions of the fractional order Buck converter in DCM operations are affected by the inductor order and/or capacitor order. The fractional order inductor and fractional order capacitor are designed, and PSIM simulations are performed to confirm the correctness of the derivations and theoretical analysis.

• Journal of Power Electronics
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• 제16권5호
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• pp.1802-1812
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• 2016

Cross regulation is a key technical issue of single-inductor multiple-output (SIMO) DC-DC converters. This paper investigates the cross regulation in single-inductor dual-output (SIDO) Buck converters with continuous conduction mode (CCM) operation. The expressions of the DC voltage gain, control to the output transfer function, cross regulation transfer function, cross coupled transfer function and impedance transfer function of the converter are presented by the time averaging equivalent circuit approach. A small signal model of a SIDO CCM Buck converter is built to analyze this cross regulation. The laws of cross regulation with respect to various load conditions are investigated. Simulation and experiment results verify the theoretical analysis. This study will be helpful for converter design to reduce the cross regulation. In addition, a control strategy to reduce cross regulation is performed.

• Journal of Power Electronics
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• 제14권5호
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• pp.899-907
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• 2014

This paper proposes a single-phase bidirectional AC/DC converter topology applied in V2G systems, which consists of an inverter and a bidirectional non-inverting buck-boost converter. This topology can operate in four modes: buck charging, boost charging, buck discharging and boost discharging with high input current quality and unity input power factor. The inverter switches at line frequency, which is different from conventional voltage source inverters. A bidirectional buck-boost converter is utilized to adapt to a wider charging voltage range. The modulation and control strategy is introduced in detail, and the switching patterns are optimized to reduce the current ripple. In addition, the semiconductor losses are analyzed. Simulation and experimental results demonstrate the validity and effectiveness of the proposed topology.

• Journal of Power Electronics
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• 제11권6호
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• pp.793-800
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• 2011

This paper investigates the operational modes of buck dc-dc converters and their energy transmission methods. The operational modes of such converters are classified in two types, discontinuous conduction mode (DCM) and continuous conduction mode (CCM). In this paper, the critical inductance relation of DCM and CCM is determined. The equations of the output voltage ripple (OVR) for each mode are obtained for a specific input voltage and load resistance range. The maximum output voltage ripple (MOVR) is also obtained for each mode. The filter size is decreased and the minimum required inductance value is calculated to guarantee the minimization of the MOVR. The experimental and simulation results in PSCAD/EMTDC prove the correctness of the presented theoretical concepts.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 추계학술대회
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• pp.398-401
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• 2011

본 논문에서는 고효율의 CMOS PWM DC-DC 벅 변환기를 설계하였다. 설계된 CMOS PWM DC-DC 벅 변환기는 입력전압(3.4-3.9V)로부터 일정한 출력전압(1-2.8V)을 생성한다. Inductor-based 방식을 택하였고, 제어 대상은 전류이며, Pulse Width Modulation(PWM) 모드로 동작한다. 회로 구성은 Power Switch, Pulse Width Generation, Buffer, Zero Current Sensing, Current Sensing Circuit, Clock & Ramp generation, V-I Converter, Soft Start, Compensator, Modulator 등 이다. 제안된 CMOS PWM DC-DC 벅 컨버터는 Switching Frequency가 약 1MHz이고, 부하 전류가 약 40mA이상부터 CCM동작을 하며 100mA일 때 98.71%의 최대 효율을 갖는다. 또한, 출력전압 리플은 0.98mV이다(입력전압 3.5V, 출력전압 2.5V 기준). 제안된 회로의 검증을 위해 CMOS $0.18{\mu}m$ 공정을 이용하여 시뮬레이션을 수행하였다.