• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.7
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• pp.44-51
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• 2010

This paper proposes the architecture of high-performance Viterbi decoder circuit. The proposed circuit does not require additional memory to calculate the branch metrics because it uses the characteristics of the branch data. The speed of the Viterbi decoder circuit is increased up to 75% by rearranging the path metric data in SRAM and registers properly for fast add-compare-select operations. We described the proposed Viterbi decoder circuit in Verilog HDL and synthesized the gate-level circuit using 130nm standard cell library. The synthesized circuit consists of 8,858 gates and its maximum operating frequency is 130MHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.6
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• pp.598-604
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• 2011

A method of miniaturizing branch line coupler with connected coupled lines is presented. The quarter-wavelength transmission lines in the typical microstrip branch line coupler are replaced with the connected coupled lines with same characteristics of ones for compact size. The connected coupled line is analyzed by T-equivalent circuit and Z parameters based on the even-odd mode analysis. The proposed branch line couplers with connected coupled line are designed and fabricated on FR4 substrate at 2.4 GHz. The measured results show good agreement with theoretical prediction. And the experimental results show that the size of coupler is 37 precent smaller than conventional coupler. This minimized coupler is suitable for Butler Matrix as feeder for mobile communication beam forming antenna.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.5
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• pp.278-286
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• 2000

A new large-scale network geometric analysis is introduced. For a large-scale circuit, it must be analyzed with a geometric diagram and figure. So many equations are induced from a geometric loop-node diagram. The results are arranged into a simple matrix, of course. In case of constructing a network diagram, it is not easy to handle voltage and current sources together. Geometric loop analysis is related to voltage sources, and node analysis is to current sources. The reciprocal transfer is possible only to have series or parallel impedance. If not having this impedance, in order to obtain equivalent circuit, many equations must be derived. In this paper a loop-reduction method is proposed. With this method current source branch is included into the other branch, and disappears in circuit diagram. So the number of independent circuit equations are reduced as much as that of current sources. The number is not (b-n+1), but (b-n+1-p). Where p is the number of current sources. The reduction procedure is verified with a geometric principle and circuit theory. A resultant matrix can be constructed directly from this diagram structure, not deriving circuit equations. We will obtain the last results with the help of a computer.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.21-22
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• 2007

Topology processing is indispensable basic function as it generate a real-time BUS-BRANCH model in Energy Management Systems because most application softwares such as state estimation, power flow, etc., require BUS-BRANCH circuit data. This paper propose an expert system to generate BUS-BRANCH circuit model using Artificial Intelligence technology and it is applied to 154kV distribution substations.

• Journal of international Conference on Electrical Machines and Systems
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• v.2 no.1
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• pp.57-64
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• 2013

The functional characteristic of LISN circuit, which is used for measurements of conductive noise in mains power line, is basically related to frequency characteristics of passive elements like inductors used in the circuit as well as the frequency response of inductors is highly related to the resins used in the varnishing process. The significant problem in determination of an inductor's frequency characteristic is the intrinsic resistance, inductance and parasitic capacitance. In this triplet, the parasitic capacitance is the major limiting factor of inductor's frequency range. This capacitance depends on inductor design parameters and materials filling the spaces of coil like resin and its coherency after curing process. In this paper, two similar inductors were designed and built. The first inductor was not varnished while the second one was varnished with VPI technology. VPI, or Vacuum, Pressure, Impregnation technology is one of the most reliable methods performing good insulating conditions for electrical circuits and windings based on resins. The measured results show that implying varnishing technology does not significantly affect the frequency response. However, due to mechanical solidity aspects and improved environmental protection, it is better to varnish the inductors.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.6
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• pp.78-84
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• 1984

We propose a new algorithm which detects stuck-open faults in CMOS circuits without being affected by time skews not using additional circuits. That is, the Domino CMOS circuit structure is used as circuit configurations and the clocking gate in this circuit is modeled as one branch, then test sequence is generated by using the transition test. Also, it is verified by applying this algorithm implemented in VAX II/780 to arbitrary CMOS circuits that all of stuck-open faults which were not detected because of time skews in conventional methods is detected.

• Journal of Magnetics
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• v.20 no.4
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• pp.400-404
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• 2015

Various kinds of winding arrangements can be used to enable fault current limiters (FCL) to tolerate higher forces without resulting in a substantial increase in construction and fabrication costs. In this paper, a distributed winding arrangement is investigated in terms of its effects on the short-circuit forces in a three-phase FCL. The force magnitudes of the AC supplied windings are calculated by employing a finite element-based model in the time stepping procedure. The leakage flux and radial and axial force magnitudes obtained from the simulation are compared to those obtained from a conventional winding arrangement. The comparison shows that the distributed winding arrangement significantly reduces the radial and, especially, the axial force magnitudes.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.05a
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• pp.202-207
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• 2002

This paper deals with a novel shunted actuator, which has a capability to suppress multi-mode vibration amplitudes by using a pair of piezoceramic patches. In order to describe the characteristic behaviors of shunted dampers connected with a series and a parallel resistor-negative capacitive branch circuit, the stiffness ratio and loss factor with respect to the non-dimensional frequency are considered. To obtain a guideline model of a piezo/beam system connected with a series and a parallel resistor-negative capacitor branch circuit, the governing equations of motion is derived through Hamiltons principle and a piezo sensor equation as well as a shunt damping matrix is developed. The theoretical analysis shows that the shunted actuator developed in this study can significantly reduce multiple-mode vibration amplitudes simultaneously over the whole structural frequency range.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.246-249
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• 2000

In this paper, we describe an automated extraction program that transforms a mask layout into an approximated equivalent circuit information suitable for circuit simulation, and that extract the geometric parameters of stacked MOSFETs and the distributed RCs of layout blocks. To extract equivalent circuit from mask layout, we propose new block disassembly technique capable of accurate computations of distributed RCs at branch point, using vectorized edges which represent the outline of an individual polygon.

• Journal of electromagnetic engineering and science
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• v.8 no.2
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• pp.47-51
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• 2008

In this paper, we present a cost effective parallel-branch spiral inductor with the enhanced quality factor and the resonance frequency. This structure is designed to improve the quality factor, but different from other fully stacked spiral inductors. The parallel-branch effect is increased by overlapping the first metal below the second metal with same direction. Measurement result shows an increased quality factor of 12 % improvement. Also, we show an octagonal parallel-branch inductor which reduces the parasitic capacitances for higher frequency applications.