• Title/Summary/Keyword: Boolean operations

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A Study on the Optical Logic Gates Using Liquid Crystal Displays (액정 표시 소자를 이용한 광 논리 게이트에 관한 연구)

  • 송주소;권원현;은재정;박한규
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.7
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    • pp.844-850
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    • 1988
  • In this paper, the implementation of optical parallel boolean logic gates using two Liquid Crystal TVs is described. Based on theory of polarization modulation, two Liquid Crystal TVs are arranged in tandem and parallel to perform optical logic operations. Experimental results of binary image using two Liquid Crystal TVs are presented.

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A Study on the Computation of D-Classes based on the Properties of Operations of Boolean Algebras (논리 대수의 연산 특성을 이용한 D-클래스 계산에 대한 연구)

  • Han, Jae-Il
    • 한국IT서비스학회:학술대회논문집
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    • 2005.11a
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    • pp.408-413
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    • 2005
  • D-클래스는 암호학 등의 보안 분야에 응용될 수 있는 가능성을 가지고 있다. 그러나 D-클래스 계산은 NP-완전 문제로서 현재 $4{\times}4$ 이하 크기의 행렬에 대한 D-클래스 만이 알려져 있어 D-클래스의 특성에 대한 연구가 제대로 이루어지지 못하고 있다. 최근 새로운 D-클래스를 얻기 위하여 보다 효율적인 D-클래스 계산에 대한 연구가 수행되었으나 아직 새로운 D-클래스를 계산할 수 있을 정도의 효율적인 연구결과는 보이지 않고 있다. 본 논문은 논리 대수의 연산 특성을 이용하여 D-클래스 계산을 보다 효율적으로 할 수 있는 수학적 이론과 방법을 제시한다.

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A study on the split triangle-based solid modelling (분리형 삼각형을 기준으로한 입체모델링에 관한 연구)

  • Chae, Hee-Chang;Chung, In-Sung
    • Journal of the Korean Society for Precision Engineering
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    • v.10 no.1
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    • pp.89-99
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    • 1993
  • A solid modeller was developed in this paper. Representation scheme of modelling is nonmanifold B-rep. While namy B-rep modellers use edges as basic element of modelling, this modeller is triangle-based. New modelling element, split triangle that is composed of 3 pure half-edges and has no information about the adjoining triangles, was defined to enlarge the range of representation. Corresponding algorithms for Boolean set operations were also developed.

Image Encryption using the chaos function and elementary matrix operations (혼돈함수와 기본 행렬 연산을 이용한 영상의 암호화)

  • Kim Tae-Sik
    • Journal of Korea Society of Industrial Information Systems
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    • v.11 no.1
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    • pp.29-37
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    • 2006
  • Due to the spread of mobile communication with the development of computer network, nowadays various types of multimedia data play an important role in many areas such as entertainments, culture contents, e-commerce or medical science. But for the real application of these data, the security in the course of saving or transferring them through the public network should be assured. In this sense, many encryption algorithm have been developed and utilized. Nonetheless, most of them have focused on the text data. So they may not be suitable to the multimedia application because of their large size and real time constraint. In this paper, a chaotic map has been employed to create a symmetric stream type of encryption scheme which may be applied to the digital images with a large amounts of data. Then an efficient algebraic encryption algorithm based on the elementary operations of the Boolean matrix and image data characteristics.

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Geometric Modeling of Electrodes for Injection Mold based on a Solid Modeler (솔리드 모델러를 기반으로 한 사출 금형용 전극 형상의 모델링)

  • 이철수;박광렬;이태경
    • Korean Journal of Computational Design and Engineering
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    • v.6 no.1
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    • pp.9-16
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    • 2001
  • Electrical discharge machining(EDM) is an important process of machining the injection mold. This paper includes efficient design processes of electrodes for EDM. Based on the solid modeler, electrodes can be created by boolean and offset operations with core/cavity models. The built-in offset operations of the solid modeler may occur unexpected results due to the limitations of the solid modeler. We proposed the multi-step and moving-face offset processes in order to apply the EDM clearances. The proposed design processes are implemented with Unigraphics Vl5 API functions and C language and tested on Windows NT 4.0.

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An Algorithm for Computing the Reliability of Multiple Terminal-Pairs (다중 터미널 신뢰도 계산을 위한 효율적 알고리즘)

  • 하경재;김원경
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2000.04a
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    • pp.385-388
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    • 2000
  • The computation of a terminal-pair reliability is started with a Boolean sum of products expression corresponding to simple paths of the pair of nodes. This expression is then transformed into another equivalent expression to be a Sum of Disjoint Products form. The terminal reliability can then be obtained in a straightforward manner from the Sum of Disjoint Products form. In this paper, we proposed an efficient method to obtain reliability expressions for calculating multiple K terminal-pairs reliability between terminal-pairs of nodes of computers of complex networks. Actual programming results show that the new method is superior with regard to computational efficiency, especially for computing the reliability of multiple terminals.

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Optimization-Based Pattern Generation for LAD (최적화에 근거한 LAD의 패턴생성 기법)

  • Jang, In-Yong;Ryoo, Hong-Seo
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2005.10a
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    • pp.409-413
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    • 2005
  • The logical analysis of data(LAD) is an effective Boolean-logic based data mining tool. A critical step in analyzing data by LAD is the pattern generation stage where useful knowledge and hidden structural information in data is discovered in the form of patterns. A conventional method for pattern generation in LAD is based on term enumeration that renders the generation of higher degree patterns practically impossible. In this paper, we present a new optimization-based pattern generation methodology and propose two mathematical programming medels, a mixed 0-1 integer and linear programming(MILP) formulation and a well-studied set covering problem(SCP) formulation for the generation of optimal and heuristic patterns, respectively. With benchmark datasets, we demonstrate the effectiveness of our models by automatically generating with much ease patterns of high complexity that cannot be generated with the conventional approach.

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An Algorithm for Computing of the Network Reliability (SDP기법에 근거한 전체 네트워크 신뢰도 계산을 위한 효율적 알고리즘)

  • 하경재;서상희
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2000.04a
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    • pp.473-476
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    • 2000
  • The network reliability is to be computed in terms of the terminal reliability. The computation of a termini reliability is started with a Boolean sum of products expression corresponding to simple paths of the pair of nodes. This expression is then transformed into another equivalent expression to be a Disjoint Sum of Products form. But this computaion of the terminal reliability obviously does not consider the communication between any other nodes but for the source and the sink. In this paper, we derive the overall network reliability which is the probability of communication that each node in the network communicates with all other remaining nodes. For this, we propose a method to make the SOP disjoint for deriving the network reliability expression from the system success expression using the modified Sheinman's method and modified BDD method.

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Study on Geometric Simulation System of Machining Operations (절삭 가공 시뮬레이션 시스템의 개발에 관한 연구)

  • 이상규;박재민;노형민
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2003.06a
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    • pp.869-872
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    • 2003
  • This paper presents a geometric machining simulation algorithm to enhance the reliability and user-friendliness of a comprehensive computer aided process planning (CAPP) system by verifying generated NC data. In order to represent the complex machining geometry with high accuracy, the proposed algorithm is developed based on a boundary representative (B-rep) solid modelling kernel. Solid models are used to represent the part geometry. tool swept volume and material removal volume by Boolean unite and subtract operations. By integrating a machining simulation procedure into the CAPP system, the systematic analysis of the tool path can be implemented synthetically. To demonstrate and check the validity of suggested system, a simple example of simulation is represented and the result is discussed.

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A Hierarchical and Incremental DRC System Using Sliced-Edge Trace Algorithm (Sliced-Edge Trace 알고리듬을 이용한 계층적 Incremental DRC 시스템)

  • 문인호;김현정;오성환;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.1
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    • pp.60-73
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    • 1991
  • This paper presents an efficient algorithm for incremental and hierarchical design rule checking of VLSI layouts, and describes the implementation of a layout editor using the proposed algorithm. Tracing the sliced edges divided by the intersection of the edges either ina polygon or in two polygons (Sliced-Edge Trace), the algorithm performs VLSI pattern operations like resizing and other Boolean operations. The algorithm is not only fast enough to check the layouts of full-custom designs in real-time, but is general enough to be used for arbitrarily shaped polygons. The proposed algorithm was employed in developingt a layout editor on engineering workstations running UNIX. The editor has been successfully used for checking, generating and resizing of VLSI layouts.

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