• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2003년도 춘계학술대회 논문집
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• pp.869-872
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• 2003

This paper presents a geometric machining simulation algorithm to enhance the reliability and user-friendliness of a comprehensive computer aided process planning (CAPP) system by verifying generated NC data. In order to represent the complex machining geometry with high accuracy, the proposed algorithm is developed based on a boundary representative (B-rep) solid modelling kernel. Solid models are used to represent the part geometry. tool swept volume and material removal volume by Boolean unite and subtract operations. By integrating a machining simulation procedure into the CAPP system, the systematic analysis of the tool path can be implemented synthetically. To demonstrate and check the validity of suggested system, a simple example of simulation is represented and the result is discussed.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2002년도 춘계학술대회논문집
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• pp.273-277
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• 2002

This paper describes an optimal synthesis method of binary neural network(BNN) for an approximation problem of a circular region and synthetic image having four class using a newly proposed learning algorithm. Our object is to minimize the number of connections and neurons in hidden layer by using a Newly Expanded and Truncated Learning Algorithm(NETLA) based on the multilayer BNN. The synthesis method in the NETLA is based on the extension principle of Expanded and Truncated Learning (ETL) learning algorithm using the multilayer perceptron and is based on Expanded Sum of Product (ESP) as one of the boolean expression techniques. The number of the required neurons in hidden layer can be reduced and fasted for learning pattern recognition.. The superiority of this NETLA to other algorithms was proved by simulation.

• 대한전자공학회논문지
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• 제24권6호
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• pp.1040-1048
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• 1987

We propose a hardware architecture called Multiring which is applicable for various geometrical operations on rectilinear objects such as design rule checking in VLSI layout and many image processing operations including noise suppression and coutour extraction. It has both a fast execution speed and extremely high flexibility. The whole architecture is mainly divided into four parts` I/O between host and Multiring, ring memory, linear processor array and instruction decoder. Data transmission between host and Multiring is bit serial thereby reducing the bandwidth requirement for teh channel and the number of external pins, while each row data in the bit map stored in ring memory is processed in the corresponding processor in full parallelism. Each processor is simultaneously configured by the instruction decoder/controller to perform one of the 16 basic instructions such as Boolean (AND, OR, NOT, and Copy), geometrical(Expand and Shrink), and I/O operations each ring cycle, which gives Multiring maximal flexibility in terms of design rule change or the instruction set enhancement. Correct functional behavior of Multiring was confirmed by successfully running a software simulator having one-to-one structural correspondence to the Multiring hardware.

• 전자공학회논문지A
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• 제28A권10호
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• pp.847-854
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• 1991

This paper presents a new output phase assignment algorithm which determines the phases of all the nodes in a given boolean network. An estimation function is defined, which is represented by the relation between the literals in the given function expression. A weight function, WT (fi, fj) is defined, which is represented by approximate amount of common subexpression between function fi and fj. Common Subexpression Graph(CSG) is generated for phase selection by the weight function between all given functions. We propose a heuristic algorithm finding subgraph of which sum of weights has maximum by assigning phases into the given functions. The experiments with MCNC benchmarks show the efficiency of the proposed method.

• 전자공학회논문지B
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• 제32B권12호
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• pp.1652-1662
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• 1995

In this paper, a hybrid neural network is proposed to improve the learning ability of a neural network. The union of the characteristics of a Self-Organizing Neural Network model and of multi-layer perceptron model using the backpropagation learning method gives us the advantage of reduction of the learning error and the learning time. In learning process, the proposed hybrid neural network reduces the number of nodes in hidden layers to reduce the calculation time. And this proposed neural network uses the fuzzy feedback values, when it updates the responding region of each node in the hidden layer. To show the effectiveness of this proposed hybrid neural network, the boolean function(XOR, 3Bit Parity) and the solution of inverse kinematics are used. Finally, this proposed hybrid neural network is applied to the visual tracking control of a PUMA560 robot, and the result data is presented.

• 충청수학회지
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• 제28권2호
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• pp.331-343
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• 2015

Invertible transformations over n-bit words are essential ingredients in many cryptographic constructions. When n is large such invertible transformations are usually represented as a composition of simpler operations such as linear functions, S-P networks, Feistel structures and T-functions. Among them we study T-functions which are probably invertible transformations and are very useful in stream ciphers. In this paper we study the number of single cycle T-functions satisfying some conditions and characterize single cycle T-functions on $(\mathbb{Z}_2)^n$ generated by some elements in $(\mathbb{Z}_2)^{n-1}$.

• ETRI Journal
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• 제34권5호
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• pp.795-798
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• 2012

This letter proposes a new low-complexity motion estimation method. The proposed method classifies various nonmatching pixel pairs into several categories and assigns an appropriate weight for each category in the matching stage. As a result, it can significantly improve performance compared to that of the conventional methods by adding only one 1-bit addition and two Boolean operations per pixel.

• 한국정보과학회 언어공학연구회:학술대회논문집(한글 및 한국어 정보처리)
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• 한국정보과학회언어공학연구회 2001년도 제13회 한글 및 한국어 정보처리 학술대회
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• pp.175-182
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• 2001

본 논문은 사전에 기반한 질의변환 교차언어 문서검색에서, 대역어 중의성 문제를 해결하기 위한, 질의어 가중치 부여 및 구조화 방법을 제안한다. 제안하는 방법의 질의 변환 과정은 다음의 세 단계로 이루어진다. 첫째, 대역어 클러스터링을 통해 먼저 질의어 단어의 적합한 의미를 결정짓고, 둘째, 문맥정보와 지역정보를 이용하여 후보 대역어들간의 상호관계를 분석하며, 셋째, 각 후보 대역어들을 연결하여, 후보 질의어를 만들고 각각에 가중치를 부여하여 weighted Boolean 질의어로 생성하게 된다. 이를 통해, 단순하고 경제적이지만, 높은 성능을 낼 수 있는 사전에 의한 질의변환 교차언어 문서검색 방법을 제시하고자 한다.

• 한국수학사학회지
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• 제12권1호
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• pp.32-44
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• 1999

This paper is a sequel to [8]. Development of modern logic was initiated by Boole and Morgan. Boolean logic is one of their completed works. Cantor created the set theory along with cardinal and ordinal numbers. His theory on infinite sets brought about a remarkable development on modern mathematical theory, but generated many paradoxes (e.g. Russell Paradox) that in turn motivated mathematicians to solve them. Further, mathematicians attempted to construct sound foundations for Mathematics. As a result three important schools of thought were formed in relation to fundamentals of mathematics for the resolution of paradoxes of set theory, namely logicism developed by Russell and Whitehead, intuitionism lead by Brouwer and formalism contended by Hilbert and Bernays. In this paper, we examine the logic for intuitionism which is originated by Brouwer in 1908 and study Heyting algebra.

• 전자공학회논문지A
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• 제28A권1호
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• pp.60-73
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• 1991

This paper presents an efficient algorithm for incremental and hierarchical design rule checking of VLSI layouts, and describes the implementation of a layout editor using the proposed algorithm. Tracing the sliced edges divided by the intersection of the edges either ina polygon or in two polygons (Sliced-Edge Trace), the algorithm performs VLSI pattern operations like resizing and other Boolean operations. The algorithm is not only fast enough to check the layouts of full-custom designs in real-time, but is general enough to be used for arbitrarily shaped polygons. The proposed algorithm was employed in developingt a layout editor on engineering workstations running UNIX. The editor has been successfully used for checking, generating and resizing of VLSI layouts.