• Title/Summary/Keyword: Body biasing

Search Result 11, Processing Time 0.022 seconds

Floating Inverter Amplifiers with Enhanced Voltage Gains Employing Cross-Coupled Body Biasing

  • Jae Hoon Shim
    • Journal of Sensor Science and Technology
    • /
    • v.33 no.1
    • /
    • pp.12-17
    • /
    • 2024
  • Floating inverter amplifiers (FIAs) have recently garnered considerable attention owing to their high energy efficiency and inherent resilience to input common-mode voltages and process-voltage-temperature variations. Since the voltage gain of a simple FIA is low, it is typically cascaded or cascoded to achieve a higher voltage gain. However, cascading poses stability concerns in closed-loop applications, while cascoding limits the output swing. This study introduces a gain-enhanced FIA that features cross-coupled body biasing. Through simulations, it is demonstrated that the proposed FIA designed using a 28-nm complementary metal-oxide-semiconductor technology with a 1-V power supply can achieve a high voltage gain (> 90 dB) suitable for dynamic open-loop applications. The proposed FIA can also be used as a closed-loop amplifier by adjusting the amount of positive feedback due to the cross-coupled body biasing. The capability of achieving a high gain with minimum-length devices makes the proposed FIA a promising candidate for low-power, high-speed sensor interface systems.

Rectifier with Comparator Using Unbalanced Body Biasing to Control Comparing Time for Wireless Power Transfer (비대칭 몸체 바이어싱 비교기를 사용하여 비교시간을 조절하는 무선 전력 전송용 정류기)

  • Ha, Byeong Wan;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.24 no.11
    • /
    • pp.1091-1097
    • /
    • 2013
  • This paper presents a rectifier with comparator using unbalanced body biasing in $0.11{\mu}m$ RF CMOS process. It is composed of MOSFETs and two comparators. The comparator is used to reduce reverse leakage current which occurs when the load voltage is higher than input voltage. For the comparator, unbalanced body biasing is devised. By using unbalanced body biasing, reference voltage for comparator changing from high state to low state is increased, and it reduces time interval for leakage current to flow. 13.56 MHz 2 Vpp signal is used for input and $1k{\Omega}$ resistor and 1 nF capacitor are used for output load for simulation and experimental environment. In simulation environment, voltage conversion efficiency(VCE) is 87.5 % and Power conversion efficiency(PCE) is 50 %. When the rectifier is measured, VCE shows 90.203 % and PCE shows 45 %.

13.56~915 MHz CMOS Rectifier Using Bootstrapping and Active Body Biasing (부트스트래핑과 능동 몸체 바이어싱을 이용한 13.56~915 MHz용 CMOS 정류기)

  • Jin, Ho Jeong;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.26 no.10
    • /
    • pp.932-935
    • /
    • 2015
  • This paper proposes a rectifier using bootstrapping and active body biasing in $0.11{\mu}m$ RF CMOS process. The proposed rectifier employs the full-wave rectifying structure with cross coupling and increases the power conversion efficiency by reducing the threshold voltage and leakage current using bootstrapping and active bias biasing. Also, it has been designed to be applied to a wide range of applications from 13.56 MHz used in wireless power transmission to 915 MHz used in RFID. As a measured result, 80 % of power conversion efficiency is obtained when the input power is 0 dBm at $10k{\Omega}$ load resistance and 13.56 MHz. Also 40 % of power conversion efficiency is shown in 915 MHz.

Post Silicon Management of On-Package Variation Induced 3D Clock Skew

  • Kim, Tak-Yung;Kim, Tae-Whan
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.12 no.2
    • /
    • pp.139-149
    • /
    • 2012
  • A 3D stacked IC is made by multiple dies (possibly) with heterogeneous process technologies. Therefore, die-to-die variation in 2D chips renders on-package variation (OPV) in a 3D chip. In spite of the different variation effect in 3D chips, generally, 3D die stacking can produce high yield due to the smaller individual die area and the averaging effect of variation on data path. However, 3D clock network can experience unintended huge clock skew due to the different clock propagation routes on multiple stacked dies. In this paper, we analyze the on-package variation effect on 3D clock networks and show the necessity of a post silicon management method such as body biasing technique for the OPV induced 3D clock skew control in 3D stacked IC designs. Then, we present a parametric yield improvement method to mitigate the OPV induced 3D clock skew.

Design of a new adaptive circuit to compensate for aging effects of nanometer digital circuits (나노미터 디지털회로의 노화효과를 보상하기위한 새로운 적응형 회로 설계)

  • Kim, Kyung Ki
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.18 no.6
    • /
    • pp.25-30
    • /
    • 2013
  • In nanoscale MOSFET technology, aging effects such as Negative Bias Temperature Instability(NBTI), Hot carrier Injection(HCI), Time Dependent Dielectric Breakdown (TDDB) and so on which affect circuit reliability can lead to severe degradation of digital circuit performance. Therefore, this paper has proposed the adaptive compensation circuit to overcome the aging effects of digital circuits. The proposed circuit deploys a power gating structure with variable power switch width and variable forward body-biasing voltage in order to adaptively compensate for aging induced performance degradation, and has been designed in 45nm technology.

VT-Modulation of Planar Tunnel Field-Effect Transistors with Ground-Plane under Ultrathin Body and Bottom Oxide

  • Sun, Min-Chul;Kim, Hyun Woo;Kim, Hyungjin;Kim, Sang Wan;Kim, Garam;Lee, Jong-Ho;Shin, Hyungcheol;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.14 no.2
    • /
    • pp.139-145
    • /
    • 2014
  • Control of threshold voltage ($V_T$) by ground-plane (GP) technique for planar tunnel field-effect transistor (TFET) is studied for the first time using TCAD simulation method. Although GP technique appears to be similarly useful for the TFET as for the metal-oxide-semiconductor field-effect transistor (MOSFET), some unique behaviors such as the small controllability under weak ground doping and dependence on the dopant polarity are also observed. For $V_T$-modulation larger than 100 mV, heavy ground doping over $1{\times}10^{20}cm^{-3}$ or back biasing scheme is preferred in case of TFETs. Polarity dependence is explained with a mechanism similar to the punch-through of MOSFETs. In spite of some minor differences, this result shows that both MOSFETs and TFETs can share common $V_T$-control scheme when these devices are co-integrated.

Transparent and Flexible All-Organic Multi-Functional Sensing Devices Based on Field-effect Transistor Structure

  • Trung, Tran Quang;Tien, Nguyen Thanh;Seol, Young-Gug;Lee, Nae-Eung
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2011.02a
    • /
    • pp.491-491
    • /
    • 2011
  • Transparent and flexible electronic devices that are light-weight, unbreakable, low power consumption, optically transparent, and mechanical flexible possibly have great potential in new applications of digital gadgets. Potential applications include transparent displays, heads-up display, sensor, and artificial skin. Recent reports on transparent and flexible field-effect transistors (tf-FETs) have focused on improving mechanical properties, optical transmittance, and performances. Most of tf-FET devices were fabricated with transparent oxide semiconductors which mechanical flexibility is limited. And, there have been no reports of transparent and flexible all-organic tf-FETs fabricated with organic semiconductor channel, gate dielectric, gate electrode, source/drain electrode, and encapsulation for sensor applications. We present the first demonstration of transparent, flexible all-organic sensor based on multifunctional organic FETs with organic semiconductor channel, gate dielectric, and electrodes having a capability of sensing infrared (IR) radiation and mechanical strain. The key component of our device design is to integrate the poly(vinylidene fluoride-triflouroethylene) (P(VDF-TrFE) co-polymer directly into transparent and flexible OFETs as a multi-functional dielectric layer, which has both piezoelectric and pyroelectric properties. The P(VDF-TrFE) co-polumer gate dielectric has a high sensitivity to the wavelength regime over 800 nm. In particular, wavelength variations of P(VDF-TrFE) molecules coincide with wavelength range of IR radiation from human body (7000 nm ~14000 nm) so that the devices are highly sensitive with IR radiation of human body. Devices were examined by measuring IR light response at different powers. After that, we continued to measure IR response under various bending radius. AC (alternating current) gate biasing method was used to separate the response of direct pyroelectric gate dielectric and other electrical parameters such as mobility, capacitance, and contact resistance. Experiment results demonstrate that the tf-OTFT with high sensitivity to IR radiation can be applied for IR sensors.

  • PDF

Development of Wireless Real-Time Gas Detector System for Chemical Protection Performance Test of Personal Protective Equipment (화생방 보호의 성능평가를 위한 무선 실시간 가스 검출기 개발)

  • Kah, Dong-Ha
    • Journal of the Korea Institute of Military Science and Technology
    • /
    • v.23 no.3
    • /
    • pp.294-301
    • /
    • 2020
  • Man-In-Simulant Test(MIST) provides a test method to evaluate chemical protective equipments such as protective garments, gloves, footwear and gas mask. The MIST chamber is built to control concentration of chemical vapor that has a activity space for two persons. Non-toxic methyl-salicylate(MeS) is used to simulate chemical agent vapor. We carried out to measure inward leakage MeS vapors by using passive adsorbent dosimeter(PAD) which are placed on the skin at specific locations of the body while man is activity according to the standard procedure in MIST chamber. But more time is required for PADs and there is concern of contamination in PADs by recovering after experiment. Therefore detector for measuring in real time is necessary. In order to analyze in real time the contamination of the personal protective equipment inside the chemical environment, we have developed a wireless real-time gas detector. The detector consists of 8 gas-sensors and 1 control-board. The control-board includes a CPU for processing a signal, a power supply unit for biasing the sensor and Bluetooth-chipset for transmission of signals to external PC. All signals from gas-sensors are converted into digital signals simultaneously in the control-board. These digital signals are stored in external PC via Bluetooth wireless communication. The experiment is performed by using protective equipment worn on manikin. The detector is mounted inside protective equipment which is capable of providing a real-time monitoring inward leakage MeS vapor. Developed detector is demonstrated the feasibility as real-time detector for MIST.

A Low Power, Wide Tuning Range VCO with Two-Step Negative-Gm Calibration Loop (2단계 자동 트랜스컨덕턴스 조절 기능을 가진 저전력, 광대역 전압제어 발진기의 설계)

  • Kim, Sang-Woo;Park, Joon-Sung;Pu, Young-Gun;Hur, Jeong;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.2
    • /
    • pp.87-93
    • /
    • 2010
  • This paper presents a low-power, wide tuning range VCO with automatic two-step negative-Gm calibration loop to compensate for the process, voltage and temperature variation. To cover the wide tuning range, digital automatic negative-Gm tuning loop and analog automatic amplitude calibration loop are used. Adaptive body biasing (ABB) technique is also adopted to minimize the power consumption by lowering the threshold voltage of transistors in the negative-Gm core. The power consumption is 2 mA to 6mA from a 1.2 V supply. The VCO tuning range is 2.65 GHz, from 2.35 GHz to 5 GHz. And the phase noise is -117 dBc/Hz at the 1 MHz offset when the center frequency is 3.2 GHz.

Design of 256Kb EEPROM IP Aimed at Battery Applications (배터리 응용을 위한 1.5V 단일전원 256Kb EEPROM IP 설계)

  • Kim, Young-Hee;Jin, RiJun;Ha, Pan-Bong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.10 no.6
    • /
    • pp.558-569
    • /
    • 2017
  • In this paper, a 256Kb EEPROM IP aimed at battery applications using a single supply of 1.5V which is embedded into an MCU is designed. In the conventional cross-coupled VPP (boosted voltage) charge pump using a body-potential biasing circuit, cross-coupled PMOS devices of 5V in it can be broken by the junction or gate oxide breakdown due to a high voltage of 8.53V applied to them in exiting the program or erase mode. Since each pumping node is precharged to the input voltage of the pumping stage at the same time that the output node is precharged to VDD in the cross-coupled charge pump, a high voltage of above 5.5V is prevented from being applied to them and thus the breakdown does not occur. Also, all erase, even program, odd program, and all program modes are supported to reduce the times of erasing and programming 256 kilo bits of cells. Furthermore, disturbance test time is also reduced since disturbance is applied to all the 256 kilo bits of EEPROM cells at once in the cell disturb test modes to reduce the cell disturbance testing time. Lastly, a CG driver with a short disable time to meet the cycle time of 40ns in the erase-verify-read mode is newly proposed.