• 한국통신학회논문지
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• 제32권2A호
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• pp.195-202
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• 2007

A differential space-frequency block code - orthogonal frequency division multiplexing (SFBC-OFDM) scheme as a multiple-input multiple-output (MIMO) transmission technique for next-generation digital multimedia broadcasting (DMB) is proposed in this paper. A linear decoding method for differential SFBC, which performs comparably to the ML decoding method, is derived for the cases of two or four transmit antennas. A simple table lookup method is proposed to improve the efficiency of the encoding/decoding process of DSFBC for the case of non-constant modulus constellations. A DMB MIMO channel model, developed by extending the 3GPP MIMO model to fit DMB environments, is used to compare BER performances of differential space block code schemes for various channel environments. Simulation results show that the differential SFBC-16QAM scheme using either four transmit antennas with one receive antenna or two transmit antennas with two receive antennas achieves a performance gain of 12dB than that of the conventional DQPSK scheme, even with a data rate twice faster.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.537-538
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• 2008

A step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in 0.18um CMOS standard process. In an effort to improve low load efficiency, this paper proposes the PFM (Pulse Frequency modulation) voltage mode 1MHz switching frequency step-down DC-DC converter with on-chip compensation. Capacitor multiplier method can minimize error amplifier compensation block size by 20%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87% for the output voltage of 1.8V (input voltage : 3.3V), maximum load current 500mA, and 0.14% output ripple voltage. The total core chip area is $mm^2$.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2000년도 추계학술대회 논문집
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• pp.179-183
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• 2000

This paper is concerned with achieving the high motion accuracy of linear motion bearing guide according to estimate accuracy average effect of bearing. Accuracy average effect can be obtained b analysis the relationship between motion error of the table and spatial frequency of the rail form error. And influences of ball diameter, ball number, and clock length on block motion error and block number on the table motion error are analyzed theoretically. In addition to, a simple experiment is performed in order to verify theoretical result.

• 전기전자학회논문지
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• 제11권4호
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• pp.340-347
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• 2007

This paper proposes a new class of Space-Time Block Codes, which is manipulated from the existing transmit diversity schemes. We analyze the performance and the receiver complexity of the proposed scheme and confirm that the new diversity scheme can yield performance gain over other existing four-transmit antenna cases. By relaxing the diversity criterion on code designs, the proposed space-time code provides a full transmission rate for four-transmit antennas and makes it possible to approach the open-loop Shannon channel capacity. Outage capacity and simulation results are used to show that substantial improvements in performance while maintaining a simple linear processing receiver structure are obtained in frequency selective channels.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.53-56
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• 2001

With the ever increasing clock frequency and integration level of CMOS circuits, I/O(input/output) and interconnect issues are becoming a growing concern. In this thesis, we propose the 2.5Gbps high speed input driver This driver consists of four different blocks, which are the high speed serializer , PECL(pseudo emitter coupled logic) Line Driver, PLL(phase lock loop) and pre-emphasis signal generator. The proposed pre-emphasis block will compensate the high frequency components of the 2.5Gbps data signal. Using the pre-emphasis block, we can obtain 2.5Gbps data signal with differential peak to peak voltage about 900 m $V_{p.p}$ This driver structure is on fabrication in 2.5v/10.25um 1poly, 5metal CMOS process.

• 전기학회논문지P
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• 제57권3호
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• pp.255-259
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• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• 한국자동차공학회논문집
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• 제5권1호
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• pp.186-194
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• 1997

The objective of this study is to develope knock control algorithms which can increase engine power without causing frequent knock occurrence. A four cylinder spark-ignition engine is used for the experiments to develop knock control algorithms which use block vibration signals. Knock occurrence is detected accurately by using knock threshold values which consider the difference of transmission path of each cylinder. Spark timing is controlled both simultaneously and individually. With the simultaneous control, torque gain is achieved by retarding the spark timing on knock occurrence in propotion to the knock intensity. The individual knock control algorithm results in higher torque gain than the simultaneous knock control algorithm. The knock occurrence frequency of the individual knock control algorithm is about twice the value of the simultaneous knock control algorithm results. Both control algorithms give similar torque gain of about 3% when they are optimized.

• 한국산업정보학회:학술대회논문집
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• 한국산업정보학회 2001년도 춘계학술대회논문집:21세기 신지식정보의 창출
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• pp.318-324
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• 2001

In this paper we propose the adaptive scheme to place more search points as long as the operation tapability of the motion estimator in the video codec permits. And the proposed algorithm takes advantage of the intuitive fact that the quality of the decoded video is more degraded as the spatial frequency of the corresponding block is increased due to the augmentation of local minima per unit area. Thererore, we propose the scheme to enhance the quality by locating relatively more search points in the block with high frequency components by analyzing the spatial frequencies of the video sequence. As a result, the proposed scheme can adaptively place more search points possibly permitted by the motion estimator and guarantees better quality compared to the TSS and FS.

• ETRI Journal
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• 제35권4호
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• pp.710-713
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• 2013

We propose a new space-time block coding (STBC) for asynchronous cooperative systems in full-duplex mode. The orthogonal frequency division multiplexing (OFDM) transmission technique is used to combat the timing errors from the relay nodes. At the relay nodes, only one OFDM time slot is required to delay for a pair-wise symbol swap operation. The decoding complexity is lower for this new STBC than for the traditional quasi-orthogonal STBC. Simulation results show that the proposed scheme achieves excellent performances.

• 한국항공우주학회지
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• 제39권2호
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• pp.178-182
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• 2011

Dubaisat-1 저궤도 위성을 위한 FSK 수신기 RF 블록이 개발되었다. 수신기는 위성 명령을 위한 상향링크 채널에 주파수 편이 보상을 위한 도플러 추적 기능을 가지고 있다. 수신기는 LNA, 주파수 하향기 그리고 중간주파수 모듈로 구성되어 있다. 중간주파수 모듈은 입력신호에 대한 추종 및 고정을 위한 도플러 추적회로를 가지고 있다. 수신기는 무게, 전력소모, 추적속도 및 BER 등의 Dubaisat-1 요구사항을 만족한다.