• 제목/요약/키워드: Bio-nano

검색결과 870건 처리시간 0.028초

A 0.55" PDLC-LCoS Micro-display for Mobile Projectors

  • Do, Yun-Seon;Yang, Kee-Jeong;Sung, Shi-Joon;Kim, Jung-Ho;Lee, Gwang-Jun;Lee, Yong-Hwan;Chung, Hoon-Ju;Roh, Chang-Gu;Choi, Byeong-Dae
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1527-1530
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    • 2009
  • A LCoS micro-display using polymer dispersed liquid crystals (PDLCs) for light switching layer was fabricated. The Si backplane of SVGA ($800{\times}600$) with a pixel size of $14{\times}14mm^2$ was prepared by a $0.35{\mu}m$ 18V CMOS process. PDLCs were filled in the gap between backplane and ITO glass by conventional vacuum filling method. The prepared panels were driven by a field sequential color (FSC) scheme at the frequency of 180Hz and were successful in modulating LED lights to show projection images. The preparation and performance of PDLC-LCoS are presented.

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Schottky Barrier MOSFETs with High Current Drivability for Nano-regime Applications

  • Jang, Moon-Gyu;Kim, Yark-Yeon;Jun, Myung-Sim;Choi, Chel-Jong;Kim, Tae-Youb;Park, Byoung-Chul;Lee, Seong-Jae
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권1호
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    • pp.10-15
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    • 2006
  • Various sizes of erbium/platinum silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from $20{\mu}m$ to 10nm. The manufactured SB-MOSFETs show excellent DIBL and subthreshold swing characteristics due to the existence of Schottky barrier between source and channel. It is found that the minimization of trap density between silicide and silicon interface and the reduction of the underlap resistance are the key factors for the improvement of short channel characteristics. The manufactured 10 nm n-type SBMOSFET showed $550{\mu}A/um$ saturation current at $V_{GS}-V_T$ = $V_{DS}$ = 2V condition ($T_{ox}$ = 5nm) with excellent short channel characteristics, which is the highest current level compared with reported data.

Tailoring Porosity of Colloidal Boehmite Sol by Controlling Crystallite Size

  • Park, Myung-Chul;Lee, Sung-Reol;Kim, Hark;Park, In;Choy, Jin-Ho
    • Bulletin of the Korean Chemical Society
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    • 제33권6호
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    • pp.1962-1966
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    • 2012
  • Boehmite sols have been prepared by crystallization of amorphous aluminum hydroxide gel obtained by hydrolysis and peptization of aluminum using acetic acid. The size of the boehmite crystallites could be controlled by Al molar concentration in amorphous gel by means of controlling grain growth at nucleation stage. The size of boehmite increases as a function of Al molar concentration. With increasing boehmite crystallite size, the $d_{(020)}$ spacing and the specific surface area decreases, whereas the pore volume increases along with pore size. Especially, the pore size of the boehmite sol particles is comparable to the crystallite size along the b axis, suggesting that the fibril thickness along the b axis among the crystallite dimensions of the boehmite contributes to the pore size. Therefore, the physical properties of boehmite sols can be determined by the crystallite size controlled as a function of initial Al concentration.

Back-gate bias를 이용한 SOI nano-wire BioFET의 electrical sensing (Electrical sensing of SOI nano-wire BioFET by using back-gate bias)

  • 정명호;안창근;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.354-355
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    • 2008
  • The sensitivity and sensing margin of SOI(silicon on insulator) nano-wire BioFET(field effect transistor) were investigated by using back-gate bias. The channel conductance modulation was affected by doping concentration, channel length and channel width. In order to obtain high sensitivity and large sensing margin, low doping concentration, long channel and narrow width are required. We confirmed that the electrical sensing by back-gate bias is effective method for evaluation and optimization of bio-sensor.

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$O_2$ plasma 표면 처리 공정에 의한 SOI nano-wire Bio-FET 소자의 전기적 특성 열화 (Degradation of electrical characteristics in SOI nano-wire Bio-FET devices)

  • 오세만;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.356-357
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    • 2008
  • The effects of $O_2$ plasma ashing process for surface treatment of nano-wire Bio-FET were investigated. In order to evaluate the plasma damage introduced by $O_2$ plasma ashing, a back-gate biasing method was developed and the electrical characteristics as a function of $O_2$ plasma power were measured. Serious degradations of electrical characteristics of nano-wire Bio-FET were observed when the plasma power is higher than 50 W. For curing the plasma damages, a forming gas anneal (2 %, $H_2/N_2$) was carried out at $400^{\circ}C$. As a result, the electrical characteristics of nano-wire Bio-FET were considerably recovered.

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