• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.9
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• pp.65-72
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• 2011

A binary integration is one of sub-optimal pulse integration which decides detection based on discriminating m successful detections out of n trials in radar systems using multiple pulse repetition frequencies. This paper introduces target measurement error reduction technique to reduce azimuth errors in suboptimal binary integration radar which applies the near value by m rather than the optimal m and verifies the performance by analyzing the experimental data measured from real radar.

• Proceedings of the Korean Statistical Society Conference
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• 2003.05a
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• pp.79-84
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• 2003

Likelihood estimation in random-effect models is often complicated because the marginal likelihood involves an analytically intractable integral. Numerical integration such as Gauss-Hermite quadrature is an option, but is generally not recommended when the dimensionality of the integral is high. An alternative is the use of hierarchical likelihood, which avoids such burdensome numerical integration. These two approaches for fitting binary data are compared and the advantages of using the hierarchical likelihood are discussed. Random-effect models for binary outcomes and for bivariate binary-continuous outcomes are considered.

• Genomics & Informatics
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• v.17 no.1
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• pp.10.1-10.3
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• 2019

To identify miRNA-mRNA interaction pairs associated with binary phenotypes, we propose a hierarchical structural component model for miRNA-mRNA integration (HisCoM-mimi). Information on known mRNA targets provided by TargetScan is used to perform HisCoM-mimi. However, multiple databases can be used to find miRNA-mRNA signatures with known biological information through different algorithms. To take these additional databases into account, we present our advanced application software for HisCoM-mimi for binary phenotypes. The proposed HisCoM-mimi supports both TargetScan and miRTarBase, which provides manually-verified information initially gathered by text-mining the literature. By integrating information from miRTarBase into HisCoM-mimi, a broad range of target information derived from the research literature can be analyzed. Another improvement of the new HisCoM-mimi approach is the inclusion of updated algorithms to provide the lasso and elastic-net penalties for users who want to fit a model with a smaller number of selected miRNAs and mRNAs. We expect that our HisCoM-mimi software will make advanced methods accessible to researchers who want to identify miRNA-mRNA interaction pairs related with binary phenotypes.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.12
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• pp.100-107
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• 1994

This article describes the hardware design scheme of Hamming MAXNET algorithm which is appropriate for binary pattern classification with minimum HD measurement between stimulus vector and storage vector. Circuit integration is profitable to Hamming MAXNET because the structure of hamming network have a few connection nodes over the similar neuro-algorithms. Designed hardware is the two-layered structure composed of hamming network and MAXNET which enable the characteristics of low power consumption and fast operation with biline volgate sensing scheme. Proposed Hamming MAXNET hardware was designed as quantize-level converter for simulation, resulting in the expected binary pattern convergence property.

• The Journal of Korea Robotics Society
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• v.4 no.1
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• pp.68-73
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• 2009

The UPnP is middleware architecture that supports dynamic distributed computing environment. It has many good features for possible use as middleware in robot system integration. There is a need for bulky binary data transmission between distributed robot S/W components. Since the UPnP utilizes SOAP protocol for message transmission, however, it is not efficient to send bulky binary data. In order to overcome this weak point, this paper proposes UPnP-MTOM, MTOM (Message Transmission Optimization Mechanism) implementation over UPnP, as an efficient way for bulky binary data transmission with UPnP messages. This paper presents our implementation method and experimental results of the UPnP-MTOM implementation.

• The Journal of the Korea Contents Association
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• v.18 no.4
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• pp.214-222
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• 2018

The purpose of this study is to analyze the role of individualistic, family, and social characteristics of immigrant women on marriage on community integration. It is focused on exploring how the immigrant women on marriages' residential district differentiate community integration. The study adopts a questionnaire method in research of immigrant women on marriage in all parts of Korea. Data are collected from 163(Metropolitan Government & City), 182(Provincial Government) immigrant women on marriage for empirical analysis respectively. Technique used in analyzing data is Binary Logit Model primarily. In conclusion, on the results of test, it turned out to be strong significant influence on provincial regions than the metropolitan city regions statistically excepting family, and social characteristics.

• Journal of the Korean Institute of Intelligent Systems
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• v.12 no.2
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• pp.135-143
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• 2002

In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast courier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like {0, 1, 2, 3}. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used toed as LUT(Lood Up Table).

• Journal of Information Processing Systems
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• v.14 no.2
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• pp.469-486
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• 2018

We propose an enhanced version of the local binary pattern (LBP) operator for texture extraction in images in the context of image retrieval. The novelty of our proposal is based on the observation that the LBP exploits only the lowest kind of local information through the global histogram. However, such global Histograms reflect only the statistical distribution of the various LBP codes in the image. The block based LBP, which uses local histograms of the LBP, was one of few tentative to catch higher level textural information. We believe that important local and useful information in between the two levels is just ignored by the two schemas. The newly developed method: gradual locality integration of binary patterns (GLIBP) is a novel attempt to catch as much local information as possible, in a gradual fashion. Indeed, GLIBP aggregates the texture features present in grayscale images extracted by LBP through a complex structure. The used framework is comprised of a multitude of ellipse-shaped regions that are arranged in circular-concentric forms of increasing size. The framework of ellipses is in fact derived from a simple parameterized generator. In addition, the elliptic forms allow targeting texture directionality, which is a very useful property in texture characterization. In addition, the general framework of ellipses allows for taking into account the spatial information (specifically rotation). The effectiveness of GLIBP was investigated on the Corel-1K (Wang) dataset. It was also compared to published works including the very effective DLEP. Results show significant higher or comparable performance of GLIBP with regard to the other methods, which qualifies it as a good tool for scene images retrieval.

• Journal of the Korea Computer Industry Society
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• v.3 no.1
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• pp.57-66
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• 2002

In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast Fourier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi-valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like ［0,1,2,3］. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used as LUT(Look Up Table) Finally, for the compatibility with the binary system, multiple-valued hybrid-type FFT processor was proposed and designed using binary-four valued encoder, four-binary valued decoder, and the electric current mode CMOS circuit.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.6 no.1
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• pp.32-37
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• 1981

The novel design method of ternary rate multiplier is proposed. This paper sugests the new implementation technique of multiplier implemented by the technique is capable of working at higher spced than that of the ternary counter type. This technique is intended to use the binary elements except the ternary inverter. And also, the mordetn COS/MOS integration process can easily implement the circuit designed by this method.