• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.18-21
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• 1999

This paper presents a speed and position sensorless control of permanent magnet synchronous motors using an integral binary observer. In order to improve the steady state performance of the binary observer, the binary observer is formed by adding extra integral dynamics to the switching hyperplane equation. The observer structure and its deign method are described. The experimetntal results of the proposed algorithm are presented to demonstrate the effectiveness of the approach.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.979-983
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• 1989

This paper proposes a new concept, called merit factor Fr, for evaluating the randomness of binary random sequences. The merit factor Fr is obtained from the expected values of the autocorrelation function of the binary random sequence. Using this merit factor Fr, randomness of the binary random sequences generated by the random sampling method is evaluated.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.194-197
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• 2003

We proposed Binary ASK system for 1Giga bit Modem. The Binary ASK system has a high speed shutter transmitter and no IF receiver only by symbol synchronization. The advantage of proposed system is that circuitry is very simple without IF process. The disadvantage of proposed system are that line spectrum occurs unordinary interference to other channels, and enhancement to 4-level system is impossible due to its large SNR degradation.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.306-307
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• 1995

In this paper, a binary disturbance observer is implemented, and the validity is verified by experiments. A disturbance observer with binary control is proposed to suppress the chattering of the conventional sliding mode observer in estimation of the external disturbance. As a result of experiments, it is confirmed that the robust and high precision position control is possible by the proposed binary observer.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.588-591
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• 2009

This paper proposes a reversible information hiding method for binary images. A half of pixels in noisy blocks on cover images is candidate for embeddable pixels. Among the candidate pixels, we select compressive pixels by bit patterns of its neighborhood to compress the pixels effectively. Thus, embeddable pixels in the proposed method are compressive pixels in noisy blocks. We provide experimental results using several binary images binarized by the different methods.

• The Transactions of the Korea Information Processing Society
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• v.7 no.5
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• pp.1474-1481
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• 2000

The number of keystream cycle sequences has been proposed as a characteristic of binary sequence generator for cryptographic application, but in general the most of binary sequence generators have a single cycle. On the other hand, S-box has been used to block cipher for a highly nonlinear element and then we apply it to the stream cipher with a high crypto-degree. In this paper, we propose a multiple-cycle binary sequence generator based on S-box which has a high nonlinearity containing SAC property and analyze its period, linear complexity, randomness and the number of keystream cycle sequences.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.5 no.1
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• pp.35-43
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• 1993

A numerical model for the solidification of binary mixture is proposed. Numerical model, which employs enthalpy method, is modified from Continuum model, that is, improved relation is proposed for the Enthalpy - Temperature - Concentration - Liquid Mass Fraction. One dimensional example was selected to verify the proposed model. The results show that the new relation can be applied successfully to the solidification or melting of binary mixture.

• ETRI Journal
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• v.27 no.6
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• pp.814-817
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• 2005

Fast binary dilation and erosion algorithms using run-length encoding (RLE) are proposed. RLE is an alternative way of representing a binary image using a run, which is a sequence of '1' pixels. First, we derive the run-based representation of dilation and erosion and then present the full steps of the proposed algorithms in detail.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2001.05a
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• pp.105-108
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• 2001

In this paper, the learning algorithm called advanced expanded and truncate algorithm(AETLA) is proposed to training multilayer binary neural network to approximate binary to binary mapping. AETLA used merit of ETL and MTGA learning algorithm. We proposed to new learning algorithm to decrease number of hidden layer. Therefore, learning speed of the proposed AETLA learning algorithm is much faster than other learning algorithm.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.195-198
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• 2000

It is possible to perform the digital fuzzy logical high-speed and high-precision computation by the use of redundantly-represented binary positive-digit number arithmetic operation. In this paper, as basic operation circuits in the fuzzy logic new voltage-mode 4-valued binary parallel processing operation circuits using positive redundantly-expressed binary-coded numbers is discussed.