• Title/Summary/Keyword: Bias-stress

Search Result 292, Processing Time 0.022 seconds

Light Effects on the Bias Stability of Transparent ZnO Thin Film Transistors

  • Shin, Jae-Heon;Lee, Ji-Su;Hwang, Chi-Sun;KoPark, Sang-Hee;Cheong, Woo-Seok;Ryu, Min-Ki;Byun, Chun-Won;Lee, Jeong-Ik;Chu, Hye-Yong
    • ETRI Journal
    • /
    • v.31 no.1
    • /
    • pp.62-64
    • /
    • 2009
  • We report on the bias stability characteristics of transparent ZnO thin film transistors (TFTs) under visible light illumination. The transfer curve shows virtually no change under positive gate bias stress with light illumination, while it shows dramatic negative shifts under negative gate bias stress. The major mechanism of the bias stability under visible illumination of our ZnO TFTs is thought to be the charge trapping of photo-generated holes at the gate insulator and/or insulator/channel interface.

BTS 측정 분석을 통한 MLCC 소자의 결함 여부 판단

  • Choe, Pyeong-Ho;Kim, Sang-Seop;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2012.08a
    • /
    • pp.298-298
    • /
    • 2012
  • 본 연구에서는 Bias Temperature Stress (BTS) 측정을 통한 다층세라믹커패시터(Multi-Layer Ceramic Capacitor, MLCC) 소자 분석에 대한 연구를 진행하였다. BTS 분석은 소자 내부에 존재하는 Na+, K+ 등의 mobile charge 검출을 위한 방법으로 positive bias와 negative bias stress에 따른 C-V 특성 곡선으로부터 mobile charge의 정량적 해석이 가능하다. 실험 결과 positive bias stress 후의 C-V 특성 곡선이 stress 전 C-V 특성 곡선과 비교해 negative bias 영역으로 0.0376 V 만큼 shift 하였다. 또한 수식(QM = $Cox{\cdot}{\triangle}V$)으로부터 $1.7{\times}1,011$개의 mobile charge가 존재함을 확인하였다. 본 연구는 MLCC 소자 내의 금속 오염물 존재 여부에 따른 소자의 전기적 특성 변화 분석을 위해 진행되었으며, BTS 분석은 반도체 소자 뿐 아니라 본 연구에서와 같이 커패시터 소자의 결함 여부 판단에도 이용 가능함을 확인하였다.

  • PDF

Experimental Investigation of Physical Mechanism for Asymmetrical Degradation in Amorphous InGaZnO Thin-film Transistors under Simultaneous Gate and Drain Bias Stresses

  • Jeong, Chan-Yong;Kim, Hee-Joong;Lee, Jeong-Hwan;Kwon, Hyuck-In
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.17 no.2
    • /
    • pp.239-244
    • /
    • 2017
  • We experimentally investigate the physical mechanism for asymmetrical degradation in amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) under simultaneous gate and drain bias stresses. The transfer curves exhibit an asymmetrical negative shift after the application of gate-to-source ($V_{GS}$) and drain-to-source ($V_{DS}$) bias stresses of ($V_{GS}=24V$, $V_{DS}=15.9V$) and ($V_{GS}=22V$, $V_{DS}=20V$), but the asymmetrical degradation is more significant after the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20 V) nevertheless the vertical electric field at the source is higher under the bias stress ($V_{GS}$, $V_{DS}$) of (24 V, 15.9 V) than (22 V, 20 V). By using the modified external load resistance method, we extract the source contact resistance ($R_S$) and the voltage drop at $R_S$ ($V_{S,\;drop}$) in the fabricated a-IGZO TFT under both bias stresses. A significantly higher RS and $V_{S,\;drop}$ are extracted under the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20V) than (24 V, 15.9 V), which implies that the high horizontal electric field across the source contact due to the large voltage drop at the reverse biased Schottky junction is the dominant physical mechanism causing the asymmetrical degradation of a-IGZO TFTs under simultaneous gate and drain bias stresses.

Effects of Temperature Stress on VFB Shifts of HfO2-SiO2 Double Gate Dielectrics Devices

  • Lee, Kyung-Su;Kim, Sang-Sub;Choi, Byoung-Deog
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2012.08a
    • /
    • pp.340-341
    • /
    • 2012
  • In this work, we investigated the effects of temperature stress on flatband voltage (VFB) shifts of HfO2-SiO2 double gate dielectrics devices. Fig. 1 shows a high frequency C-V of the device when a positive bias for 10 min and a subsequent negative bias for 10 min were applied at room temperature (300 K). Fig. 2 shows the corresponding plot when the same positive and negative biases were applied at a higher temperature (473.15 K). These measurements are based on the BTS (bias temperature stress) about mobile charge in the gate oxides. These results indicate that the positive bias stress makes no difference, whereas the negative bias stress produces a significant difference; that is, the VFB value increased from ${\Delta}0.51$ V (300 K, Fig. 1) to ${\Delta}14.45$ V (473.15 K, Fig. 2). To explain these differences, we propose a mechanism on the basis of oxygen vacancy in HfO2. It is well-known that the oxygen vacancy in the p-type MOS-Cap is located within 1 eV below the bottom of the HfO2 conduction band (Fig. 3). In addition, this oxygen vacancy can easily trap the electron. When heated at 473.15 K, the electron is excited to a higher energy level from the original level (Fig. 4). As a result, the electron has sufficient energy to readily cross over the oxide barrier. The probability of trap about oxygen vacancy becomes very higher at 473.15 K, and therefore the VFB shift value becomes considerably larger.

  • PDF

Reliability Assessment of Normally-off p-AlGaN-gate GaN HEMTs with Gate-bias Stress (상시불통형 p-AlGaN-게이트 질화갈륨 이종접합 트랜지스터의 게이트 전압 열화 시험)

  • Keum, Dongmin;Kim, Hyungtak
    • Journal of IKEEE
    • /
    • v.22 no.1
    • /
    • pp.205-208
    • /
    • 2018
  • In this work, we performed reverse- and forward-gate bias stress tests on normally-off AlGaN/GaN high electron mobility transistors(HEMTs) with p-AlGaN-gate for reliability assessment. Inverse piezoelectric effect, commonly observed in Schottky-gate AlGaN/GaN HEMTs during reverse bias stress, was not observed in p-AlGaN-gate AlGaN/GaN HEMTs. Forward gate bias stress tests revealed distinct degradation of p-AlGaN-gate devices exhibiting sudden increase of gate leakage current. We suggest that forward gate bias stress tests should be performed to define the failure criteria and assess the reliability of normally off p-AlGaN-gate GaN HEMTs.

Influence of Channel Thickness Variation on Temperature and Bias Induced Stress Instability of Amorphous SiInZnO Thin Film Transistors

  • Lee, Byeong Hyeon;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
    • /
    • v.18 no.1
    • /
    • pp.51-54
    • /
    • 2017
  • TFTs (thin film transistors) were fabricated using a-SIZO (amorphous silicon-indium-zinc-oxide) channel by RF (radio frequency) magnetron sputtering at room temperature. We report the influence of various channel thickness on the electrical performances of a-SIZO TFTs and their stability, using TS (temperature stress) and NBTS (negative bias temperature stress). Channel thickness was controlled by changing the deposition time. As the channel thickness increased, the threshold voltage ($V_{TH}$) of a-SIZO changed to the negative direction, from 1.3 to -2.4 V. This is mainly due to the increase of carrier concentration. During TS and NBTS, the threshold voltage shift (${\Delta}V_{TH}$) increased steadily, with increasing channel thickness. These results can be explained by the total trap density ($N_T$) increase due to the increase of bulk trap density ($N_{Bulk}$) in a-SIZO channel layer.

The degradation phenomena in SiGe hetero-junction bipolar transistors induced by bias stress (바이어스 스트레스에 의한 실리콘-게르마늄 이종접합 바이폴라 트랜지스터의 열화 현상)

  • Lee, Seung-Yun;Yu, Byoung-Gon
    • Journal of the Korean Vacuum Society
    • /
    • v.14 no.4
    • /
    • pp.229-237
    • /
    • 2005
  • The degradation phenomena in SiGe hetero-junction bipolar transistors(SiGe HBTs) induced by bias stress are investigated in this review. If SiGe HBTs are stressed over a specific time interval, the device parameters deviate from their nominal values due to the internal changes in the devices. Reverse-bias stress on emitter-base(EB) junctions causes base current increase and current gain decrease because carriers accelerated by the electrical field generate recombination centers. When forward-bias current stress is conducted at an ambient temperature above $140^{\circ}C$ , hot carriers produced by Auger recombination or avalanche multiplication induce current gain fluctuation. Mixed-mode stressing, where high emitter current and high collector-base voltage are simultaneously applied to the device, provokes base current rise as EB reverse-bias stressing does.

Influencing Factors of Christians' COVID-19 Health Prevention Behavior (기독교인의 코로나19 건강예방행위 영향 요인)

  • Seol-Young Bang;Nam-Ju Je;Mee-Ra Park
    • Journal of the Korean Society of Industry Convergence
    • /
    • v.26 no.2_2
    • /
    • pp.293-306
    • /
    • 2023
  • The purpose of this study is a descriptive research study to analyze the factors that affect Christians' COVID-19 preventive behavior. The subjects of the study were 262 adult Christians, and the data collected were using SPSS 25.0 and AMOS 21.0 programs. As a result of the study, the subject's religious maturity level was 4.21 ± .55 points out of 5 points, COVID-19 stress was 2.86 ± .73 points out of 5 points, optimism bias was 2.94 ± 1.26 points out of 7 points, and COVID-19 preventive health behavior was 4 points. The total score was 3. 54 ± . 44 points. As a result of the correlation analysis of the subject's religious maturity, COVID-19 stress, optimistic bias, and COVID-19 preventive health behaviors, COVID-19 preventive health behaviors were faith maturity (r=.156, p=.012), COVID-19 stress (r=.216, There was a positive correlation with optimism bias (r=174, p=.005). In conclusion, it can be said that the higher the religious maturity, the higher the COVID-19 stress, and the higher the optimistic bias, the better the preventive health behavior of COVID-19, and the explanatory power of the overall model was 9.4%. In the post-COVID-19 era, it is necessary to develop educational programs that can prevent infectious diseases and promote health in the community.

Effect of Negative Substrate Bias Voltage on the Microstructure and Mechanical Properties of Nanostructured Ti-Al-N-O Coatings Prepared by Cathodic Arc Evaporation

  • Heo, Sungbo;Kim, Wang Ryeol;Park, In-Wook
    • Journal of the Korean institute of surface engineering
    • /
    • v.54 no.3
    • /
    • pp.133-138
    • /
    • 2021
  • Ternary Ti-X-N coatings, where X = Al, Si, Cr, O, etc., have been widely used for machining tools and cutting tools such as inserts, end-mills, and etc. Ti-Al-N-O coatings were deposited onto silicon wafer and WC-Co substrates by a cathodic arc evaporation (CAE) technique at various negative substrate bias voltages. In this study, the influence of substrate bias voltages during deposition on the microstructure and mechanical properties of Ti-Al-N-O coatings were systematically investigated to optimize the CAE deposition condition. Based on results from various analyses, the Ti-Al-N-O coatings prepared at substrate bias voltage of -80 V in the process exhibited excellent mechanical properties with a higher compressive residual stress. The Ti-Al-N-O (-80 V) coating exhibited the highest hardness around 30 GPa and elastic modulus around 303 GPa. The improvement of mechanical properties with optimized bias voltage of -80 V can be explained with the diminution of macroparticles, film densification and residual stress induced by ion bombardment effect. However, the increasing bias voltage above -80 V caused reduction in film deposition rate in the Ti-Al-N-O coatings due to re-sputtering and ion bombardment phenomenon.

Effects of Annealing on Electrical Characteristics of Double-Gated Silicon Nanosheet Feedback Field-Effect Transistors (더블게이트 실리콘 나노시트 피드백 전계효과 트랜지스터의 전기적 특성에 미치는 열처리 효과)

  • Hyojoo Heo;Yunwoo Shin;Jaemin Son;Seungho Ryu;Kyoungah Cho;Sangsig Kim
    • Journal of IKEEE
    • /
    • v.27 no.4
    • /
    • pp.418-424
    • /
    • 2023
  • In this study, we examined the effects of annealing on electrical characteristics of double-gated silicon nanosheet (SiNS) feedback field effect transistors (FBFETs). When bias stresses were applied for 1000 s, the double-gated SiNS FBFETs were more affected by positive bias stresses than negative bias stresses regardless of the channel mode owing to the increase of interface traps caused by electrons in the inversion layers. After annealing at 300 ℃ for 10 mins, the devices were completely recovered to their original properties, and the characteristics did not change anymore when bias stresses were applied again for 1000 s.