• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.489-492
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• 1999

The effects of alternate bias stress on p-channel poly-Si TPT's has been systematically investigated. It has been shown that the application of alternate bias stress affects device degradation for the negative bias stress as well as device improvement for the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ under bias stress.

• Journal of the Korean Statistical Society
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• 제24권2호
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• pp.507-518
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• 1995

The ordinary least squares based estiamte $S^2$ of the disturbance variance is considered in the linear regression model when the disturbances follow the first-order moving-average process. It is shown that $S^2$ is weakly consistent estimate for the disturbance varaince without any restriction on the regressor matrix X. Also, simple exact bounds on the relative bias of $S^2$ are given in finite sample sizes.

• Nuclear Engineering and Technology
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• 제54권2호
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• pp.661-665
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• 2022

The 3 MeV proton irradiation effects on SiGe low noise amplifier (LNA) (NXP BGU7005) performance under different voltage supply VCC (0 V, 2.5 V) conditions were firstly experimental studied in this present work. The S parameters including S₁₁, S₂₂, S₂₁, 1 dB compression point and noise figure (NF) of the test samples under different bias voltage supply were measured and compared before and after 3 MeV proton irradiation. The total proton irradiation fluence was 1 × 10¹⁵ protons/cm². The maximum degradation quantities of the gain S₂₁ and NF of the test samples under zero bias are measured respectively 1.6 dB and 1.2 dB. Compared with the samples under 2.5 V bias supply, the maximum degradation of S₂₁ and NF are respectively 1.1 dB and 0.8 dB in the whole frequency band. It is noteworthy that the gain and NF of SiGe LNAs under zero-bias mode suffer enhanced degradation compared with those under normal bias supply. The key influence factors are discussed based on the correlation of the SiGe device and the LNA circuit. Different process of the ionization damage and displacement damage under zero-bias and 2.5 V bias voltage supply contributed to the degradation difference. The underlying physical mechanisms are analyzed and investigated.

• 한국전기전자재료학회논문지
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• 제14권11호
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• pp.869-873
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• 2001

The effects of alternate bias stress on p-channel poly-Si TFT\`s has been systematically investigated. We alternately applied positive and negative bias stress on p-channel poly-Si TFT\`s, device Performance(V$\_$th/, g$\_$m/, leakage current, S-slope) are alternately appeared to be increasing and decreasing. It has been shown that device performance degrade under the negative bias stress while improve under the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ interface under alternate bias stress.

• 한국방재학회:학술대회논문집
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• 한국방재학회 2009년도 정기 학술발표대회
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• pp.100.2-100.2
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• 2009

• 한국군사과학기술학회지
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• 제12권3호
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• pp.368-377
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• 2009

In this paper we study the gyro bias calibration method of SDINS(Strap-Down Inertial Navigation System). Generally, SDINS's calibration is performed in 2-axis(or 3-axis) rate table with chamber for varying ambient temperature. We assumed that the majority of calibration-parameter except for gyro bias is knowned. During gyrobias calibration procedure, it can be induced some disturbances(accelerometer's short-term error induced rate table rotation and anti-vibration mount's rotation). In these cases, old gyro-bias calibration methods(using velocity error or attitude error) have an error, because these disturbances are not detectable at the same time. So that, we propose a new gyro-bias calibration method(heading error minimizing using equivalent linear transformation) that can detect anti-vibration mount's rotation. And we confirm efficiency of the new gyro-bias calibration method by simulation.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.204.1-204.1
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• 2015

We studied the electrical properties and gate bias stress (GBS) stability of thin film transistors (TFTs) with multi-stacked InZnO layers. The InZnO TFTs were fabricated via solution process and the In:Zn molar ratio was 1:1. As the number of InZnO layers was increased, the mobility and the subthreshold swing (S.S) were improved, and the threshold voltage of TFT was reduced. The TFT with three-layered InZnO showed high mobility of $21.2cm^2/Vs$ and S.S of 0.54 V/decade compared the single-layered InZnO TFT with $4.6cm^2/Vs$ and 0.71 V/decade. The three-layered InZnO TFTs were relatively unstable under negative bias stress (NBS), but showed good stability under positive bias stress (PBS).

• 복식문화연구
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• 제12권1호
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• pp.28-40
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• 2004

The purpose of this study was (1) to identify the experimental bias which could appear person perception as results of development methods (2) to find out the most desirable method in developments of stimulus. The research was a quasi experiment and the subjects were 358 male and female undergraduate students by convenient sampling. The experimental instruments consisted of a set of stimulus and semantic differential scales of 7-point bi-polar adjectives. The collected data were analyzed by Principle Component Analysis, ANOVA(analysis of variance), Scheffe's multiple range test. The independent variables were developing methods of stimulus(live person, photography of real person, 2 kinds of black and white line drawing, 2 kinds of color drawing). The results were as follows. First, five factors which were potency, sociality, appearance, evaluation, activity impressional dimensions emerged to account for the methods of development of stimulus. Second, the methods of development of stimulus had significant effects on potency, sociality, appearance, activity factors. In sociality factors, the impression of photographic stimulus was the closest to the live person's impression. However in the appearance and activity impressions, significant difference existed between live person and other developing stimulus. In the potency impression, black and white line-drawing gave the highest impressional bias. In the sociability and appearance impressions, color-drawing stimulus gave the highest impressional bias. Result: On conclusion the developments of stimulus can effect on stimulus person's impressions and these effects can produce experimental biases, the photographic stimulus gave the least impressional bias. The study shows that photography of real person will produce minimize measurement error.

• 한국재료학회지
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• 제4권1호
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• pp.9-23
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• 1994

Multitarget bias cosputter deposition(MBCD)에 의해 저온($200^{\circ}C$)에서 NaCI(100)상에 정합$CoSi_2$를 성장시켰다. X-선회절과 투과전자현미경에 의해 증착온도와 기판 bias전압에 따른 각각 silicide의 상전이와 결정성을 관찰하였다. Metal induced crystallization(MIC) 과 self bias 효과에 의해 $200^{\circ}C$에서 기판전압을 인가하지 않은 경우에도 결정질 Si이 성장하였다. MIC현상을 이론 및 실험적으로 고찰하였다. 관찰된 상전이는 $Co_2Si \to CoSi \to Cosi_2$로서 유효생성열법칙에 의해 예측된 상전이와 일치하였다. 기판 bias전압 인가시 발생한 이온충돌에 의한 충돌연쇄혼합(collisional cascade mixing), 성장박막 표면의 in situ cleaning, 핵생성처(nucleation site)이 증가로 인하여 상전이, CoSi(111)우선방위, 결정성은 증착온도에 비해 기판bias전압에 더 큰 영향을 받았다. $200^{\circ}C$에서 기판 bias전압을 증가시킴에 따라 이온충돌에 의한 결정입성장이 관찰되었으며, 이를 이온충독파괴(ion bombardment dissociation)모델에 의해 해석하였다. $200^{\circ}C$에서의 기판 bias전압증가에 따른 결정성변화를 정량적으로 고찰하기 위해 Langmuir탐침을 이용하여 $E_{Ar},\; \alpha(V_s)$를 계산하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.239-244
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• 2017

We experimentally investigate the physical mechanism for asymmetrical degradation in amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) under simultaneous gate and drain bias stresses. The transfer curves exhibit an asymmetrical negative shift after the application of gate-to-source ($V_{GS}$) and drain-to-source ($V_{DS}$) bias stresses of ($V_{GS}=24V$, $V_{DS}=15.9V$) and ($V_{GS}=22V$, $V_{DS}=20V$), but the asymmetrical degradation is more significant after the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20 V) nevertheless the vertical electric field at the source is higher under the bias stress ($V_{GS}$, $V_{DS}$) of (24 V, 15.9 V) than (22 V, 20 V). By using the modified external load resistance method, we extract the source contact resistance ($R_S$) and the voltage drop at $R_S$ ($V_{S,\;drop}$) in the fabricated a-IGZO TFT under both bias stresses. A significantly higher RS and $V_{S,\;drop}$ are extracted under the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20V) than (24 V, 15.9 V), which implies that the high horizontal electric field across the source contact due to the large voltage drop at the reverse biased Schottky junction is the dominant physical mechanism causing the asymmetrical degradation of a-IGZO TFTs under simultaneous gate and drain bias stresses.