• Journal of the Korea Institute of Military Science and Technology
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• v.13 no.6
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• pp.1071-1079
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• 2010

This paper describes the design and fabrication of a high-efficiency GaN HEMT(Gallium Nitride High-electron Mobility Transistor) Pallet power amplifier module for S-band phased array radar applications. Pallet amplifier module has a series 2-cascaded power amplifier and the final amplification-stage consists of balanced GaN HEMT transistor. In order to achieve high efficiency characteristic of pallet power amplifier module, all amplifiers are designed to the switching-mode amplifier. We performed with various PRF(Pulse Repetition Frequency) of 1, 10, 100 and 1000Hz at a fixed pulse width of $100{\mu}s$. In the experimental results, the output power, gain, and drain efficiency(${\eta}_{total}$) of the Pallet power amplifier module are 300W, 33dB, and 51% at saturated output power of 2.9GHz, respectively.

• Journal of Advanced Navigation Technology
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• v.18 no.3
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• pp.229-235
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• 2014

This paper presents the Doherty power amplifier with a digitally controlled analog predistorter circuit of Scintera Corp. to produce high power efficiency and high linearity performance. The analog predistorter improves the linearity performance because of controlling amplitude and phase values of input signal in order to improve intermodulation performance of power amplifier. Also, the power amplifier is designed by the Doherty technology to obtain the high efficiency performance. To validate the Scintera's analog predistorter, we are implemented the power amplifier with Doherty method at center frequency 2150 MHz. Compared with the balanced amplifier, the power amplifier is improved above 11% enhanced efficiency and more than 15 dB ACPR improvement.

• Journal of IKEEE
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• v.4 no.2 s.7
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• pp.241-248
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• 2000

A linear power amplifier is particular emphasized on the CDMA system using a linear modulation scheme, because intermodulation distortion which cause adjacent channel interference and co channel interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET predistortion linearizer added. Experimental result are present for Korea PCS(Personal Communication Service) frequency band. The implemented linearizer is applied to a 30dBm class A power amplifier for simulation Performance. The predistortion linearizer improves the 1dB compression point of the HPA about 2dBm, and intermoudulation distortion about 12.5dBc.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.19-22
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• 2004

This paper implemented 2.14GHz band Adaptive Hybrid Doherty (AHD) amplifier, as well as, wished to improve the high power characteristics and efficiency by composing bias adjustment circuit with LDMOS. Finally, through CAE, confirmed that AHD amplifier have superior performance than hybrid balanced amplifier. Superior characteristics of AHD amplifier is expected to affect immensely in amplifier field hereafter.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.98-104
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• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

• Journal of information and communication convergence engineering
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• v.1 no.3
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• pp.139-142
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• 2003

In this paper, we consider the factors that affect a conversion loss performance in designing a single balanced diode mixer integrated with IRF(Image Reject Filter), based on the embedded electrical wavelength placed between the IRF and mixer, diode matching and LO drive amplifier. To evaluate the conversion loss performance, we suggest two types of a single balanced mixer using 90 degree branch line coupler, microstrip line and schottky diode. One is only mixer and the other is integrated with IRF and LO drive amplifier. The measured results of a single balance diode mixer integrated IRF show the conversion loss of 8.5 dB and the flatness of 1 dB p-p from 21.2 GHz to 22.6 GHz with 10 dBm LO. The measured input PI dB and IIP3 are 7 dBm and 15 dBm respectively under the nominal LO power level of 10dBm. The LO/RF and LO/IF isolation are 22 dB and 50 dB, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.53-56
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• 2003

A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel Interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30dBm class. A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1dB gain and a P1dB of 30 dBm(two-tone) was utlized. The reduction of IMD is around 22dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1369-1373
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• 2003

A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET Predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30㏈m class A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1㏈ gain and a P1㏈ of 30 ㏈m(two-tone) was utilized. The reduction of IMD is around 22㏈.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.71-72
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• 2006

In this paper, we designed and fabricated the Doherty power amplifier which operates at 2140 MHz by using MRF 21125 RF Power FET (Motorola Co.) and Teflon substrate (${\varepsilon}_r$=2.55, H=0.76 mm, t=$70{\mu}m$, $tan{\delta}$=0.001). As a result, we obtained th improved efficiency and linearity in comparison with the conventional balanced amplifier.

• ETRI Journal
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• v.38 no.5
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• pp.972-980
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• 2016

An ultra-wideband microwave monolithic integrated circuit high-power amplifier with excellent input and output return losses for phased array jammer applications was designed and fabricated using commercial $0.25-{\mu}m$ AlGaN/GaN technology. To improve the wideband performance, resistive matching and a shunt feedback circuit are employed. The input and output return losses were improved through a balanced design using Lange-couplers. This three-stage amplifier can achieve an average saturated output power of 15 W, and power added efficiency of 10% to 28%, in a continuous wave operation over a frequency range of 6 GHz to 18 GHz. The input and output return losses were demonstrated to be lower than -15 dB over a wide frequency range.