• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.7
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• pp.592-597
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• 2000

In this study (B $a_{0.5}$/S $r_{0.5}$)Ti $O_3$[BST(50/50)] ceramic thin films were prepared by the Sol-Gel method BST(50/50) stock solution was made and spin-coated on the Indium Tin Oxide(ITO)/glass substrate at 4000 rpm for 30 seconds. The coated films were dried at 35$0^{\circ}C$ for 10 minutes and annealed at 650~75$0^{\circ}C$ for 1 hour. The microstructural properties of the BST(50/50) thin film were studied by the XRD and AFM. The ferroelectric perovskite phase was formed at the annealing condition of 75$0^{\circ}C$ for 1 hour. Dielectric constant and loss of this thin were 370, 3.7% at room temperature respectively. The polarization switching voltage showed the good value of 3V. The leakage current density of the BST(50/50) thin film was 10$^{-7A}$c $m^2$with applied voltage of 1.5V. BST(50/50) thin film capacitors having good dielectric and electrical properties are expecting for the application to the dielectric material of DRAM.RAM.M.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.455-458
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• 2001

The thin films of high permitivity in ferroelectric materials using a capacitor are applied to DRAMs and FRAMs. (Ba, Sr)TiO$_3$ thin films as ferroelectric materials were prepared by the sol-gel method and made by spin-coating on the Pt/Ti/SiO$_2$/Si substrate at 4,700 [rpm] for 10 seconds. The devices of BST thin films to composite (Ba$\_$0.7/Sr$\_$0.3/)TiO$_3$ were fabricated by changing of the depositing layer number on Pt/Ti/SiO$_2$/Si substrate. The thin film capacitor to be ferroelectric devices was investigated by structural and electrical properties. The thickness of BST thin films at each coating numbers 3, 4 and 5 times was 2500[${\AA}$], 3500[${\AA}$], 3800[${\AA}$]. The dielectric factor of thin film when the coating numbers were 3, 4 and 5 times was 190, 400 and 460 on frequency 1[MHz]. The dielectric loss of BST thin film was linearly increased by increasing of the specimen area.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.28-28
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• 2007

Ferroelectric $(Ba_{0.5}Sr_{0.5})TiO_3$ (BST) thin films of thickness 500nm were deposited on $LaAlO_3$, (LAO) substrates by at $800^{\circ}C$. BST films were characterized for structure using X-ray diffraction (XRD). The surface morphology and thickness of BST the films were characterized by atomic force microscopy (AFM) and field emission scanning electron microscope (FESEM). We measured the dielectric properties at microwave frequencies (1~3 GHz) using a symmetrical stripline resonator with shorted ends and terahertz frequencies (0.2~2.5 THz) using a time-domain terahertz spectroscopy. The real and imaginary parts of the complex dielectric constant of the BST thin films on LAO substrates were in agreement with those previously reported.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.33-36
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• 1999

In this paper, $Ba_{0.5}$Sr$_{0.5}$TiO$_3$ thin-films were prepared on Pt/Ti/Si0$_2$/Si substrates by RF magnetron sp-uttering method. We investigated electric and dielectric properties of BST thin-films with various ann-ealing temperature using in-sute RTA. Deposition conditions of BST films were set substrate temperat-ure, 30$0^{\circ}C$ and working gas ratio, Ar:O$_2$=90:10. After BST films deposited, we fabricated a capacitor of MIM structure with Al top electrode for measurement. Post-annealing using RTA performed at 40$0^{\circ}C$, $600^{\circ}C$, 80$0^{\circ}C$ for 60 sec, respectively. Also we exacted crystallization and composition of BST thin-films by XRD analysis. In measurement result, this capacitors showed a dielectric constant of about 200 at 1MHz and leakage current density of 5$\times$10$^{-8}$ A/$\textrm{cm}^2$ at 1.5V Microstructure of BST thin-films exhibited effective quality in low-temperature annealed 71ms than high-temperature annealed 71ms.s.s.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.152-152
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• 1999

1Gb급 이상 기억소자의 캐패시터 재료로 주목받고 있는 (Ba,Sr)TiO3 [BST] 박막의 전극재료로는 Pt, Ru, Ir과 같은 금속전극과 RuO2, IrO2와 산화물 전도체가 유망한 것으로 알려져 있다. 그런데, DRAM의 집적도가 증가하게 되면, BST같은 고유전율 박막을 유전재료로 사용한다 하더라도, 3차원적인 구조가 불가피하게 때문에 기존의 sputtering 방법으로는 우수한 단차피복성을 얻기 힘들므로, MOCVD법이 필수적이다. 본 연구에서는 기존에 연구되었던 Pt에 비해 식각특성이 우수하고, 비교적 낮은 비저항을 갖는 Ru 박막증착에 대한 연구를 행하였다. 본 연구에서는 수직형의 반응기와 저항 가열 방식의 susceptor로 구성된 저압 유기금속 화학증착기를 사용하여 최대 6inch 직경을 갖는 기판 위에 Ru박막을 증착하였다. Precursor로는 기존에 연구된 적이 없는 bis-(ethyo-$\pi$-cyclopentadienyl)Ru (Ru(C5H4C2H5)2, [Ru(EtCp)2])를 사용하였으며, bubbler의 온도는 85$^{\circ}C$로 하였다. Si, SiO2/Si를 사용하였으며, 증착온도 25$0^{\circ}C$~40$0^{\circ}C$, 증착압력 3Torr의 조건에서 Ru 박막을 증착하였다. Presursor를 운반하는 수송기체로는 Ar을 사용하였으며, carbon과 같은 불순물의 제거를 위해 O2를 첨가하였다. 증착된 박막은 XRD, SEM, 4-point probe등을 통해 구조적, 전기적 특성을 평가하였으며, 열역학 계산을 위해서는 SOLGASMIX-PV프로그램을 사용하였다. Ru 박막의 증착에 있어서 산소의 첨가는 필수적이었으며, Ru 박막의 증착속도는 30$0^{\circ}C$~40$0^{\circ}C$의 온도 영역에서 200$\AA$/min으로 일정하였으며, 첨가된 산소의 양이 적을수록 더 치밀하고 평탄한 표면형상을 보였으며, 또한 더 낮은 전기 전도도를 보였다. 그리고 증착된 박막은 12~15$\mu$$\Omega$cm 정도의 낮은 비저항 값을 나타냈으며 이것은 기존의 sputtering 법에 의해 증착된 Ru 박막의 비저항 값들과 비교될만하다. 한편, 높은 온도, 높은 산소분압 조건에서 RuO2의 형성을 관찰하였으며, 이것은 열역학적인 계산을 통해서 잘 설명할 수 있었다.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.319-319
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• 2004

• Proceedings of the Korean Ceranic Society Conference
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• 2003.10a
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• pp.115.1-115
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• 2003

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.79-79
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• 2008

We report the growth of $Ba_{0.5}Sr_{0.5}TiO_3$(BST) thin films and their substrate-dependent electrical characteristics. BST thin films were deposited on alumina(non-single crystal), $Al_2O_3$(100) substrates by Nd:YAG Pulsed Laser Deposition(PLD) with a 355nm wavelength at substrate temperature of $700^{\circ}C$ and post-deposition annealing at $750^{\circ}C$ in flowing $O_2$ atmosphere for 1hours. BST materials had been chosen due to high dielectric permittivity and tunability for high frequency applications, To analyze the oxygen partial pressure effects, deposited films at 1, 10, 50, 100, 150, 200, 300 mTorr. The effects of oxygen pressure on structural properties of the deposited films have been investigated by X-ray diffraction(XRD) and atomic force microscope(AFM), respectively. Then we manufactured a inter-digital capacitor(IDC) patterns twenty fingers and $10{\mu}m$ gap, $700{\mu}m$ length and electrical properties were characterized. The results provide a basis for understanding the growth mechanisms and basic structural and electrical properties of BST thin films as required for tunable microwave devices applications such as varactors and tunable filters.

• Korean Journal of Materials Research
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• v.17 no.7
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• pp.386-389
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• 2007

The dielectric properties of $(Ba_{0.5}Sr_{0.5})TiO_3$ ferroelectric thin films have been investigated according to the substrates in order to optimize the their properties. MgO, r-plane sapphire, and poly-crystalline sapphire (Alumina) substrates have been used to deposite $(Ba_{0.5}Sr_{0.5})TiO_3$ ferroelectric thin films by RF magnetron sputtering. The BST thin films deposited on the single crystal (100)MgO substrates have high tunability and low dielectric loss. These results are caused by a low misfit between the lattice parameters of the BST films and the substrate. The BST films deposited on r-plane sapphire have relatively high misfit, and the tunability of 17% and dielectric loss of 0.0007. To improve the dielectric properties of the BST films, the post-annealing methods has been introduced. The BST films deposited on (100)MgO, (1102)r-plane sapphire, and poly-crystalline sapphire substrates have best properties in post-annealing conditions of $1050^{\circ}C$, $1100^{\circ}C$, and $1150^{\circ}C$, respectively. The different optimal post-annealing conditions have been found according to the different misfits between the films and substrates, and thermal expansion coefficients. Moreover, the films deposited on alumina substrate which is relatively cheap have a good tunability properties of 23% by the post-annealing.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.106-106
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• 2000

반도체 소자가 미세화 됨에 따라 게이트 유전막으로 사용되는 SiO2의 박막화가 요구되나, boron penetration에 의한 Vt shift, 게이트 누설전류, 다결정 실리콘 게이트의 depletion effect 그리고 quantum mechanical effect 때문에 ~20 급에서 한계를 나타내고 있다. 이에 0.1$\mu\textrm{m}$이상의 design rule을 갖는 logic이나 memory 소자에서 요구되어지는 ~10 급 게이트 산화막은 SiO2(K=3.9)를 대신하여 고유전율을 갖는 재료의 채택이 필수 불가결하게 되었다. 고유전 박막 재료를 사용하면, 두께를 두껍게 해도 동일한 inversion 특성이 유지되고 carrier tunneling 이 덜하여 등가 산화막의 두께를 줄일 수 있다. 이러한 고유전박막 재료중 가장 활발히 연구되고 있는 재료는 Ta2O5, Al2O3, STO 그리고 BST 등이 있으나 Ta2O5, STO, BST 등은 실리콘 기판과 직접 반응을 한다는 문제를 가지고 있으며, Al2O3는 유전율이 낮의 재료가 최근 주목받고 있다. 본 실험에서는 ZrO2, HfO2 또는 그 silicates 등의 재료가 최근 주목 받고 있다. 본 실험에서는 ZrO2 박막의 증착조건에 따른 물리적, 전기적 특성 변화에 대하여 연구하였다. RCA 방식으로 세정한 P-type (100) 실리콘 기판위에 reactive DC sputtering 방법으로 압력 5mtorr, power 100~400W, 기판온도는 100-50$0^{\circ}C$로 변화시켜 ZrO2 박막을 증착한 후 산소와 아르곤 분위기에서 400-80$0^{\circ}C$, 10-120min으로 열처리하였다. 증착직후의 시편들과 열처리한 ZrO2 박막의 미세구조와 전기적 특성 변화를 관찰하였다. 우선 굴절율(RI)를 이용해 ZrO2 박막의 밀도를 예측하여 power와 기판온도에 따라 이론값 2.0-2.2 에 근접한 구조를 얻은 후 XRD, XPS, AFM, 그리고 TEM을 사용하여 ZrO2 박막의 chemical bonding, surface roughness 그리고 interfacial layer의 특성을 관찰하였다. 그리고 C-V, I-V measurement를 이용해 capacitance, 유전율, 누설전류 등의 전기적 특성을 관찰해 최적 조건을 설정하였다.