• 전자공학회논문지S
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• 제34S권4호
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• pp.50-56
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• 1997

In this paper, efficient quantization methods of line spectrum pairs (LSP) which has good performances and low complexity and memory are proosed for vocoder of mobile communication system. The adaptive quantization method utilizing the ordering property of LSP parameters is used in a scalar quantizer and a vector-scalar hybrid quantizer. The proposed scalar quantization algorithm needs 31 bits/frame to maintain the transparent quality of speech. The improved vector-scalar quantizer achieves an average spectral distortion of 1dB using 26 bits/frame. The proposed methods are evaluated in the channel errors and changed the predictor structure to maintain the robustness to channel errors.

• IEIE Transactions on Smart Processing and Computing
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• 제5권4호
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• pp.243-249
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• 2016

This paper proposes a new watermarking algorithm to embed watermarks in thr process of sample adaptive offsets (SAO) for high efficiency video coding (HEVC) compressed videos. The proposed method embeds two-bit watermark into the SAO offsets for each coding tree unit (CTU). To minimize visual quality degradation caused by embedding watermark, watermark bits are embedded into SAO offset depending on the SAO types of block. Furthermore, the embedded watermark can be extracted by simply adding four offsets and checking their least significant bits (LSB) at the decoder side. The experimental results show that the proposed method achieves 0.3% BD-rate increase without much visual quality degradation. Two-bit watermark for each CTU is embedded for more bit watermarking. In addition, the proposed method requires negligible computational load for watermark insertion and extraction.

• 대한임베디드공학회논문지
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• 제9권1호
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• pp.25-32
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• 2014

In this paper, we proposed a partial-way set associative cache memory with an effective memory access time and low energy consumption. In the proposed set-associative cache memory, it is allowed to access only a 2-ways among 4-way at a time. Choosing ways to be accessed is made dynamically via the least significant two bits of the tag. The chosen 2 ways are sequentially accessed by the way selection bits that indicate the most recently referred way. Therefore, each entry in the way has an additional bit, that is, the way selection bit. In addition, instead of the 4-way LRU or FIFO algorithm, we can utilize a simple 2-way replacement policy. Simulation results show that the energy*delay product can be reduced by about 78%, 14%, 39%, and 15% compared with a 4-way set associative cache, a sequential-way cache, a way-tracking cache, and a way cache respectively.

• 전기학회논문지
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• 제56권2호
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• pp.428-431
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• 2007

A floating-point number system is used to represent a wide range of real numbers using finite number of bits. The standard the IEEE adopted in 1987 divides the range of real numbers into intervals of [$2^E,2^{E+1}$), where E is an Integer represented with finite bits, and defines equally spaced equal counts of discrete numbers in each interval. Since the numbers are defined discretely, not only the number representation itself includes errors but in floating-point arithmetic some strange behaviors are observed which cannot be agreed with the real world arithmetic. In this paper errors with floating-point number representation, those with arithmetic operations, and those due to order of arithmetic operations are analyzed theoretically with help of and verification with the results of some MATLAB program executions.

• 정보통신설비학회논문지
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• 제10권2호
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• pp.80-85
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• 2011

In this paper, I propose flexible base point used for a BTC(Block Truncation Coding). Halftoning images are used for printer by reducing the number of pixel depth. During over 20 years, many researches have been studied to apply this techniques to image compression. BTC algorithms are the compression methods using digital halftoning technique about images. In the BTC algorithm, an image block is divided into higher and lower domain compared with the mean of block. then the MAX and MIN representative values are evaluated by calculating the mean of higher and lower domain respectively. At a result, an image block(for example 88 size) is compressed into 64bits pixel representation and 16 bits of the MAX and MIN. And they also have been tried to sustain the image quality high after compression. In this paper, I found that there is some marginal possibility to enhance the image quality by adjusting the base point(generally mean of block) of existing algorithms.

• 한국통신학회논문지
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• 제7권3호
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• pp.125-129
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• 1982

數MHz의 대역폭을 갖는 표준 주파수 대역폭의 애널로그(analogue) 신호를 8it) 정도의 디지틀(digital)신호로 정확하게 변환할 수 있는 대부분의 A/D변환기는 구성이 복잡하고 값도 고가이다. 따라서 본 논문에서는 전압제어 발진기(voltage-controlld oscillator)와 디지틀 판별기를 사용하여 간단한 고속 디지틀 變換機를 구성함으로써 종래의 고속 A/D 변환기에서 사용되어 오던 복잡한 論理回路를 제거하여 속도를 개선함과 동시에 회로의 단순화에 따른 경제적인 실리를 기하였다. 이 방법은 음성이나 영상신호를 8비트의 정도의 2진 부호로 변환 전송하는데 적합할 것이다.

• Progress in Superconductivity
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• 제8권1호
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• pp.16-21
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• 2006

In this paper, current status of experimental and theoretical work on quantum bits based on the semiconductor quantum dots in the University of Seoul will be presented. A new proposal utilizing the multi-valley quantum state transitions in a Si quantum dot as a possible candidate for a quantum bit with a long decoherence time will be also given. Qubits are the multi-valley symmetric and anti-symmetric orbitals. Evolution of these orbitals is controlled by an external electric field, which turns on and off the inter-valley interactions. Initialization is achieved by turning on the inter-valley Hamiltonian to let the system settle down to the symmetric orbital state. Estimates of the decoherence time is made for the longitudinal acoustic phonon process.

• 한국정밀공학회지
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• 제12권10호
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• pp.18-24
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• 1995

This paper describes a multi-computer system developed for CIM(Computer Integrated Manufacturing) system, which combines single board computers and personal computers by using RS422/485 communication and LAN. The system adopts a concept of hot run back up system based on dual CUP system of host and supervisor structure. The dual CPU system and the single board computer are respectively developed using 32 bits microcomputer and 16 bits microprocessor. 8097BH. The multi communication between two types of system is done by using RS 422/485, and also data logging computers are linked with LAN.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제9권8호
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• pp.2984-3004
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• 2015

Designing a new reversible data hiding technique with a high embedding rate and a low compression rate for vector quantization (VQ) compressed images is encouraged. This paper proposes a novel lossless data hiding scheme for VQ-compressed images based on the joint neighboring coding technique. The proposed method uses the difference values between a current VQ index and its left and upper neighboring VQ indexes to embed n secret bits into one VQ index, where n = 1, 2, 3, or 4. The experimental results show that the proposed scheme achieves the embedding rates of 1, 2, 3, and 4 bits per index (bpi) with the corresponding average compression rates of 0.420, 0.483, 0.545, and 0.608 bit per pixel (bpp) for a 256 sized codebook. These results confirm that our scheme performs better than other selected reversible data hiding schemes.

• 한국통신학회논문지
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• 제14권1호
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• pp.22-29
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• 1989

본 논문에서는 고정부호화율을 갖는 효과적인 적응 변환 부호화 방법을 제시, 연구한다. 본 방식에서는 각 블록마다 그 ac 에너지 크기에 비례하여 분산치 분포가 스케일을 달리하도록 정보원을 모델화 하고 그에 따라 비트배정을 하여 블록 양자화 한다. 본 방식은 적응 방식이면서 부호화율을 조정할 수 있는 장점이 있으며, 그 부호화율의 가변도 손쉽게 이루어진다. 제시된 방식의 성능은 컴퓨터 모의 실험을 통해 잘 알려진 Chen&Smith 방식과 신호대잡음비 및 사진 비교를 통해 평가된다.