• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.4
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• pp.147-151
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• 2002

The resistances of metal2 contact to metall and poly Si are checked by various RF etch conditions in terms of pre-cleaning. The changes of resistance are evaluated by statistical analysis method(SAS) for the AC bias power, coil power and RF target. The contact area on poly Si is shown by TEM image and the distributions of contact resistance according to ar etch target and RTP are investigated. The RTP groups have larger variations than normal RF etch targets. When the RF etch target becomes lower and coil power becomes higher, the resistances of metal2 contact to metals and poly Si have lower contact resistance. But the condition of AC bias power did not satisfied low meta12 contacts resistance for metall and poly Si simultaneously. The R-square of ststistical analysis was 0.98 for resistances of meta12 contact to poly Si and 0.87 for resistances of meta12 contact to metall.

• Journal of the Korean GEO-environmental Society
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• v.15 no.11
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• pp.13-19
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• 2014

Permeable reactive barrier has been recognized as the one of representative methods for remediation of contaminated groundwater. Reactive barrier system containing two and more reactive materials can remove multiple contaminants such as nutritive salts and heavy metals. In this study, removal efficiency of multiple contaminants was evaluated when both zeolite and basic oxygen furnace slag were used as reactive materials. Sequential batch test which consists of two materials was performed to evaluate removal efficiency comparing the reaction order of them against nutritive slats including ammonium and phosphate and heavy metal including cadmium. As a result, zeolite-basic oxygen furnace slag sequence batch test showed the best efficiency for removal of multiple contaminants including nutritive salts and heavy metal.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.65-65
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• 2009

High temperature silicon carbide Schottky diode was fabricated with Au deposited on poly 3C-SiC thin film grown on p-type Si(100) using atmospheric pressure chemical vapor deposition. The charge transport mechanism of the diode was studied in the temperature range of 300 K to 550 K. The forward and reverse bias currents of the diode increase strongly with temperature and diode shows a non-ideal behavior due to the series resistance and the interface states associated with 3C-SiC. The charge transport mechanism is a temperature activated process, in which, the electrons passes over of the low barriers and in turn, diode has a large ideality factor. The charge transport mechanism of the diode was analyzed by a Gaussian distribution of the Schottky barrier heights due to the Schottky barrier inhomogeneities at the metal-semiconductor interface and the mean barrier height and zero-bias standard deviation values for the diode was found to be 1.82 eV and $s_0$=0.233 V, respectively. The interface state density of the diode was determined using conductance-frequency and it was of order of $9.18{\times}10^{10}eV^{-1}cm^{-2}$.

• Journal of the Korean institute of surface engineering
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• v.38 no.1
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• pp.28-36
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• 2005

In this study, the reflow characteristics of copper thin films which is expected to be used as interconnection materials in the next generation semiconductor devices were investigated. Cu thin films were deposited on the TaN diffusion barrier by metal organic chemical vapor deposition (MOCVD) and annealed at the temperature between 250℃ and 550℃ in various ambient gases. When the Cu thin films were annealed in the hydrogen ambience compared with oxygen ambience, sheet resistance of Cu thin films decreased and the breakdown of TaN diffusion barrier was not occurred and a stable Cu/TaN/Si structure was formed at the annealing temperature of 450℃. In addition, reflow properties of Cu thin films could be enhanced in H₂ ambient. With Cu reflow process, we could fill the trench patterns of 0.16～0.24 11m with aspect ratio of 4.17～6.25 at the annealing temperature of 450℃ in hydrogen ambience. It is expected that Cu reflow process will be applied to fill the deep pattern with ultra fine structure in metallization.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.834-838
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• 2002

In this paper, we have fabricated 4H-SiC schottky diodes utilizing a metal-oxide overlap structure for electric filed termination. The barrier height and Ideality factor were measured by current-voltage, capacitance-voltage characteristics. Schottky barrier height(SBH) were 1.41ev for Ni and 1.35eV for Pt, 1.52eV for Pt/Ti at room temperature and Pt/Ti Schottky diode exhibited Ideality factor was 1.06 to 1.4 in the range of $25^{\circ}C{\sim}200^{\circ}C$. To improve the reverse bias characteristics, an edge termination technique is employed for Pt/Ti/4H-SiC Schottky rectifiers and the device show excellent characteristics with higher blocking voltage up to 780V compared with unterminated devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.390-390
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• 2010

We fabricate Schottky diodes with the contact between a sol-gel derived ZnO layer and Au that guarantees the expected Schottky contact due to the high work function. The formed single metal Schottky barrier shows characteristics comparable to the barrier formed by alloys. Au is deposited by thermal evaporation on a ZnO thin film that is optimally formed under sol-gel process conditions of a 1-mol zinc acetate concentration and a 3000-rpm coating speed. Possible defects. which can provide deleterious current paths. are minimized by patterning the deposited Au. The I-V curve verifies the formation of a Schottky contact. Measurements showed that the Schottky barrier height and leakage current at -5 V were 0.6 eV and $1{\times}10^{-12}A$. respectively.

• Proceedings of the Korean Society of Soil and Groundwater Environment Conference
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• 2003.09a
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• pp.78-82
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• 2003

Development of hematite-coated sand was evaluated for the application of the PRB (permeable reactive barrier) in the arsenic-contaminated subsurface of the metal mining areas. The removal efficiency of As(III) and As(V), the effect of anion competition and the capability of arsenic removal in the flow system were investigated through the experiments of adsorption isotherm, arsenic removal kinetics against anion competition and column removal. Hematite-coated sand followed a linear adsorption isotherm with high adsorption capacity at low level concentrations of arsenic (< 1.0 mg/l). When As(III) and As(V) underwent adsorption reactions in the presence of anions (sulfate, nitrate and bicarbonate), sulfate caused strong inhibition of arsenic removal, and bicarbonate and nitrate caused weak inhibition due to specific and nonspecific adsorption onto hematite, respectively. In the column experiments, high content of hematite-coated sand enhance the arsenic removal, but the amount of the arsenic removal decreased due to the higher affinity of As(V) than As(III) and reduced adsorption kinetics in the flow system, Therefore, the amount of hematite-coated sand, the adsorption affinity of arsenic species and removal kinetics determined the removal efficiency of arsenic in the flow system. arsenic, hematite-coated sand, permeable reactive barrier, anion competition, adsorption.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.10-15
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• 2006

Various sizes of erbium/platinum silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from $20{\mu}m$ to 10nm. The manufactured SB-MOSFETs show excellent DIBL and subthreshold swing characteristics due to the existence of Schottky barrier between source and channel. It is found that the minimization of trap density between silicide and silicon interface and the reduction of the underlap resistance are the key factors for the improvement of short channel characteristics. The manufactured 10 nm n-type SBMOSFET showed $550{\mu}A/um$ saturation current at $V_{GS}-V_T$ = $V_{DS}$ = 2V condition ($T_{ox}$ = 5nm) with excellent short channel characteristics, which is the highest current level compared with reported data.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.134-135
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• 2008

Ultra-thin $SiO_2/ZrO_2$ dielectrics were deposited by atomic layer chemical vapor deposition (ALCVD) method for non-volatile memory application. Metal-oxide-semiconductor (MOS) capacitors were fabricated by stacking ultra-thin $SiO_2$ and $ZrO_2$ dielectrics. It is found that the tunneling current through the stacked dielectric at the high voltage is lager than that through the conventional silicon oxide barrier. On the other hand, the tunneling leakage current at low voltages is suppressed. Therefore, the use of ultra-thin $SiO_2/ZrO_2$ dielectrics as a tunneling barrier is promising for the future high integrated non-volatile memory.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.3
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• pp.111-116
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• 2004

The Ni/SiC Schottky diode was fabricated with the $\alpha$-SiC thin film grown by the ICP-CVD method on a (111) Si wafer. $\alpha$-SiC film has been grown on a carbonized Si layer in which the Si surface was chemically converted to a very thin SiC layer achieved using an ICP-CVD method at $700^{\circ}C$. To reduce defects between the Si and $\alpha$-SiC, the surface of the Si wafer was slightly carbonized. The film characteristics of $\alpha$-SiC were investigated by employing TEM (Transmission Electron Microscopy) and FT-IR (Fourier Transform Infrared Spectroscopy). Sputterd Ni thin film was used as the anode metal. The boundary status of the Ni/SiC contact was investigated by AES (Auger Electron Spectroscopy) as a function of the annealing temperature. It is shown that the ohmic contact could be acquired beyond a 100$0^{\circ}C$ annealing temperature. The forward voltage drop at 100A/cm was I.0V. The breakdown voltage of the Ni/$\alpha$-SiC Schottky diode was 545 V, which is five times larger than the ideal breakdown voltage of the silicon device. As well, the dependence of barrier height on temperature was observed. The barrier height from C- V characteristics was higher than those from I-V.