• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.33 no.3C
• /
• pp.240-246
• /
• 2008

An MPEG-2/4 AAC decoder on 16-bit fixed-point processor is presented in this paper. To meet audio quality criteria, despite small word length, special design methods for 16-bit foxed-point AAC decoder were devised. This paper presents particular algorithms for 16-bit AAC decoding. We have implemented an efficient AAC decoder using the proposed algorithms. Audio contents can be replayed in the decoder without quality degradation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.23 no.6
• /
• pp.1433-1442
• /
• 1998

The thesis presents a dual audio decoder which can decode both AC-3 and MPEG-2 bitstream. The MPEG-2 synthesis processi s optimized via FFT to establish the common data path with AC-'3s. A dual audio decoder consists of a DSP core which performs the control-intensive part of each algorithm and a common synthesis filter which perfomrs the computation-intensive part. All the components of the dual audio decoder have been described in VHDL and simulated with a SYNOPSYS tool. The software modeling of the DSP core was used for functional validation. After being synthesized using 0.6 .mu.m-3ML technology standard cell, the dual audio decoder was simulated at gate-level with a COMPASS tool for hardware validation.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.5 no.4
• /
• pp.249-254
• /
• 2005

This paper presents a system-on-a-chip (SOC) design for digital TV. The single LSI incorporates almost all essential parts such as CPU, ISO/IEC 11172/13818 system/audio/video decoders, a video post-processor, a graphics/OSD processor and a display processor. It has analog IP's inside such as video DACs, an audio PLL, and a system PLL to reduce the system-level implementation cost. Descramblers and Smart Card interface are included to support widely used conditional access systems. The video decoder can decode two video streams simultaneously. The DSP-based audio decoder can process various audio coding specifications. The functional blocks for video quality enhancement also form outstanding features of this SoC. The SoC supports world-wide major DTV services including ATSC, ARIB, DVB, and DIRECTV.

• Journal of Korea Multimedia Society
• /
• v.10 no.8
• /
• pp.958-966
• /
• 2007

In this paper, we implement a sound-enhanced MPEG-1 audio decoder on embedded OS Platform. Low bit rate lossy audio codecs such as MP3, OGG, and AAC for mitigating the problems in storage space and network bandwidth suffer a major common problem such as a loss of high frequency fidelity of audio signal. This high frequency loss will reproduce only a band-limited low-frequency part of audio in the standard CD-quality audio. In order to overcome this problem, we embedded a sound enhancement algorithm into the MPEG-1 audio decoder and then the algorithms optimized according to the characteristic of the MPEG-1 audio layer I, II, III were implemented on an embedded OS platform. From the experimental results with spectrum analysis and listening test, we confirm the superiority of the proposed system compared to the standard MPEG-1 audio decoder.

• Proceedings of the Korean Information Science Society Conference
• /
• 1999.10c
• /
• pp.709-711
• /
• 1999

오늘날에 이르러 이동(mobile) 컴퓨팅의 중요성은 점차로 증가하는 추세에 있다. 하지만 이를 지원하기 위한 어플리케이션의 개발은 미진한 상태에 머물러 있으며, 특히 이동 컴퓨터를 위한 멀티미디어 서비스는 몇몇 기술적인 문제로 인하여 거의 제공도지 못하고 있는 것이 현실이다. 본 논문에서는 무선 LAN으로 구성된 이동 네트워크상에서 실시간 오디오 서비스를 제공하기 위한 MP3 Audio Decoder를 설계, 구현함으로써 이동 컴퓨팅 응용의 폭을 넓힌다. 그리고 이를 위한 몇 가지 고려사항과 관련 기술들을 서술하고, 구현된 프로그램의 실행 결과를 제시한다.

• Journal of the Korean Institute of Intelligent Systems
• /
• v.17 no.4
• /
• pp.477-482
• /
• 2007

This paper presents an audio decoder architecture which can decode AC-3 and MPEG-2 audio bit-streams efficiently. MPEG-2 synthesis filtering is modified by the 32-point FFT to share the common data path with the AC-3's. A programmable Audio DSP core and a hardwired common synthesis tilter are incorporated for effective decoding of two different formats.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.12C
• /
• pp.1617-1622
• /
• 2004

MPEG/Audio decoder for mobile multimedia systems requires low power consumption. Implementations of AV decoder using a single RISC processor often need high power consumption owing to cash-miss in case of insufficient cash memory. In this paper, we present a MPEG/Audio decoder for mobile handset applications and implement it on a RISC processor embedding a minimized DSP accelerator. Audio decoding algorithm is splined into two parts; computation intensive and control intensive parts. Those parts we, respectively, allocated to DSP and RISC core, which are designed to run in parallel to increase the processing efficiency. The proposed system implements MP3 and AAC decoders at l7MHz and 24MHz clocks, which are reductions of 48% and 40% of complexities in comparison with implementations on a single RISC processor. The proposed method is adequate for mobile multimedia applications with insufficient cash memory.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.37 no.5
• /
• pp.48-55
• /
• 2000

Recently due to rapid improvement of integrated circuit design environment, size of IC design is to become large to possible design System on Chip(SoC) that one chip with multi function enclosed. Also cause to this rapid change, consumption market is require to spend smallest time for new product development. In this paper to propose a methodology can design a large size IC for save time and applied to design of MPEG Layer 2 decoder to can use audio receiver in digital broadcast system. The digital broadcast audio decoder in this paper is pointed to save hardware size as optimizing algorithm. MPEG Layer 2 decoder algorithm is include MAC to can have an effect on hardware size. So coefficients are using sign digit expression. It is for hardware optimization. If using this method can design MAC without multiplier. The designed audio decoder is using 14,000 gates hardware size and save 22% (4000 gates) hardware usage than using multiplier. Also can design MPEG Layer 2 decoder usable digital broadcast receiver for short time.

• Journal of the Institute of Convergence Signal Processing
• /
• v.4 no.3
• /
• pp.7-14
• /
• 2003

MPEG-1 audio standard is the algorithm for the compression of high-qualify digital audio signals. The standard dictates the functions of encoder and decoder pair, and includes three different layers as the complexity and the performance of the encoder and decoder. In this paper, we implemented the real-time system of MPEG-1 audio layer III decoder(MP3) with the TMS320C541 fixed point DSP chip. MP3 algorithm uses psycho-acoustic characteristic of human hearing system, and it reduces the amount of data with eliminating the signals hard to be heard to the hearing system of human being. It is difficult to implement MP3 decoder with fixed Point DSP because of it's broad dynamic range. We implemented realtime system with fixed DSP chip by using weighted look-up tables to reduce the amount of calculation and solve the problem of broad dynamic range.

• Korea Multimedia Society
• /
• v.5 no.3
• /
• pp.93-101
• /
• 2001

No Abstract (See Full-text)