• Title/Summary/Keyword: Asymmetric loss

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Welfare Impacts of Behavior-Based Price Discrimination with Asymmetric Firms

  • Chung, Hoe-Sang
    • Asia-Pacific Journal of Business
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    • v.11 no.1
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    • pp.17-26
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    • 2020
  • Purpose - This paper studies the welfare impacts of behavior-based price discrimination (BBPD) when firms are asymmetric in quality improvement costs. Design/methodology/approach - To this end, we consider a differentiated duopoly model with an inherited market share, where firms first make quality decisions and then compete in prices according to the pricing scheme, namely, uniform pricing or BBPD. Findings - We show that BBPD increases social welfare relative to uniform pricing if the firms' cost gap is large enough. This is because BBPD induces more consumers to buy a high-quality product than under uniform pricing, and because a low-cost firm's profit loss from BBPD decreases as the cost difference increases. Research implications or Originality - Our analysis offers policy implications for markets where BBPD raises antitrust concerns, and quality competition prevails.

A wide ZVS range two-transformer active-clamp forward converter with low conduction loss (낮은 도통손실을 가지며 넓은 영전압 스위칭 범위를 갖는 두 개의 변압기를 이용한 능동 클램프 포워드 컨버터)

  • Moon Sang-Cheol;Park Ki-Bum;Moon Gun-Woo;Youn Myung-Joong
    • Proceedings of the KIPE Conference
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    • 2006.06a
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    • pp.369-371
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    • 2006
  • Conventional active-clamp forward converter has narrow ZVS range of main switch. Although utilizing high magnetizing current can realize wide ZVS range, it increases the conduction loss. To solve this problem, a new asymmetric two-transformer active clamp forward converter is proposed. Proposed converter achieves wide ZVS range without severe conduction loss penalty, which results in high efficiency and high power density.

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Analysis of Temperature Distribution and Heat Loss for an Asymmetric Trapezoidal Fin (비대칭 사다리꼴 핀의 온도분포와 열손실 해석)

  • Kang, Hyung-Suk;Song, Nyeon-Joo
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.36 no.4
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    • pp.377-383
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    • 2012
  • The temperature distribution of an asymmetric trapezoidal fin with various upper lateral surface slopes is investigated by using the two-dimensional analytic method. For this asymmetric fin, convection from the inner fluid to the inner wall, conduction from the inner wall to the fin base and conduction through the fin base are considered simultaneously. The temperature profile with the variation of dimensionless fin length and height coordinates is shown. Also, the temperature variation at the bottom tip of the fin is presented as a function of the fin shape factor. Heat losses through the fin base and from each side are compared for variations in fin length. One of the results shows that temperature at the fin bottom tip decreases linearly as the fin shape factor increases.

A Stereo Audio DAC with Asymmetric PWM Power Amplifier (비대칭 펄스 폭 변조 파워-앰프를 갖는 스테레오 오디오 디지털-아날로그 변환기)

  • Lee, Yong-Hee;Jun, Young-Hyun;Kong, Bai-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.7
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    • pp.44-51
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    • 2008
  • A stereo audio digital-to-analog converter (DAC) with a power amplifier using asymmetric pulse-width modulation (PWM) is presented. To adopt class-D amplifier mainly used in high-power audio appliances for head-phones application, this work analyzes the noise caused by the inter-channel interference during the integration and optimizes the design of the sigma-delta modulator to decrease the performance degradation caused by the noise. The asymmetric PWM is implemented to reduce switching noise and power loss generated from the power amplifier. This proposed architecture is fabricated in 0.13-mm CMOS technology. The proposed audio DAC including the power amplifier with single-ended output achieves a dynamic range (DR) of 95-dB dissipating 4.4-mW.

Validity assessment of VaR with Laplacian distribution (라플라스 분포 기반의 VaR 측정 방법의 적정성 평가)

  • Byun, Bu-Guen;Yoo, Do-Sik;Lim, Jongtae
    • Journal of the Korean Data and Information Science Society
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    • v.24 no.6
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    • pp.1263-1274
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    • 2013
  • VaR (value at risk), which represents the expectation of the worst loss that may occur over a period of time within a given level of confidence, is currently used by various financial institutions for the purpose of risk management. In the majority of previous studies, the probability of return has been modeled with normal distribution. Recently Chen et al. (2010) measured VaR with asymmetric Laplacian distribution. However, it is difficult to estimate the mode, the skewness, and the degree of variance that determine the shape of an asymmetric Laplacian distribution with limited data in the real-world market. In this paper, we show that the VaR estimated with (symmetric) Laplacian distribution model provides more accuracy than those with normal distribution model or asymmetric Laplacian distribution model with real world stock market data and with various statistical measures.

Design of A Asymmetric Branch Line Coupler Using Artificial Dielectric Substrate (가유전체 기판을 이용한 비대칭 브랜치 라인 커플러의 설계)

  • Lim, Jong-Sik;Lee, Jae-Hoon;Kwon, Kyung-Hoon;Ahn, Dal
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.5
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    • pp.2319-2324
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    • 2012
  • In this paper, the design of asymmetric branch line couplers using artificial dielectric substrate (ADS) is described. The effective permittivity and permeability increase in ADS because of the lots of the inserted via-holes. So the physical length and width of transmission lines realized on ADS are reduced compared to the standard lines. This enables one to design size-reduced microwave circuits. As an instance in this work, an asymmetric branch line coupler with the ratio of 3:1 is designed at 2GHz. The designed coupler has a small size of 53.4% compared to the normal circuit while the same performances are preserved. A good agreement between the simulated and measured asymmetric power dividing ratio is shown. The measured loss is only less than 0.2dB, which is a very small value.

Implementation of Polymeric Thermo-optic Modulator using a New Vertical Asymmetric Optical Coupler (새로운 수직형 비대칭 광 결합구조를 이용한 폴리머 열광학 변조기 구현)

  • Lee, So-Yeong;Gwon, Jae-Yeong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.5
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    • pp.39-48
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    • 2000
  • We newly proposed a polymer based vertical asymmetric optical coupler, which was characterized by simple fabricating procedure and short coupling length. And we fabricated a thermo-optic modulator using the polymeric optical coupler. We optimized the proposed device by coupling characteristic analysis. In a TE polarized 1.33${\mu}{\textrm}{m}$ wavelength, we obtained very short coupling length(L=277.6${\mu}{\textrm}{m}$) with 0.4${\mu}{\textrm}{m}$ thickness of middle layer, high coupling efficiency(94%), and asymmetric vertical waveguides with n$_{u}$ = 1.522, n$_{l}$ = 1.51. We implemented vortical asymmetric thermo-optic modulator with lower inverted rib waveguide and upper slab waveguide. In the 600Hz bandwidth and 4.5㎽ input power, the extinction ratio of the mode was 17㏈ with an insertion loss of 4.5㏈.

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Design of Dual-Band Patch Antenna Using Asymmetric Inset Feeding (비대칭 인셋 급전을 사용한 이중 대역 패치 안테나 설계)

  • Dong-Kook Park
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.405-410
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    • 2023
  • This paper presents a novel method of implementing a dual-band antenna using a square patch with an inset feed structure. The proposed method is to simply design a dual-band antenna using an asymmetric inset structure with different lengths of slots dug into the patch for inset feeding. To verify the proposed method, a dual-band inset patch antenna supporting 1.57 GHz GPS and 2.4 GHz WiFi bands was designed and manufactured on a 1 mm thick FR4 substrate. From measurement, it was confirmed that the frequency bands of the antenna that satisfy a return loss of -10dB or less are 1.55~1.57GHz and 2.41~2.45GHz, which has dual-band characteristics. Using the proposed method, it is possible to simply implement a dual-band antenna using inset feeding, and it is expected to be utilized in a variety of application fields.

A Study on the Loss Cost of Delayed Weaponization of Weapons System (무기체계 전력화 지연이 미치는 손실비용에 대한 연구)

  • Juhong Park;Myoungjin Choi
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.46 no.4
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    • pp.321-330
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    • 2023
  • The Korean military has sought to build an all-round military force against the national and international security environment and future asymmetric threats as well as the military threats it faces. However, while raising the need for timely electrification, there are few cases of quantitatively evaluating the loss when electrification is delayed, making it difficult for our military to provide a logical basis to support the importance of the electrification period. Therefore, through this study, we tried to analyze the index of loss cost that can support the need for timely electrification with logical and quantitative data and present it as a logical basis. To this end, the loss cost was calculated in terms of combat efficiency, equipment utilization rate, and maintenance requirements, which can be quantitatively calculated based on "combat readiness," a general impact on the military in case of delayed timely electrification.

SOI CMOS Miniaturized Tunable Bandpass Filter with Two Transmission zeros for High Power Application (고 출력 응용을 위한 2개의 전송영점을 가지는 최소화된 SOI CMOS 가변 대역 통과 여파기)

  • Im, Dokyung;Im, Donggu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.174-179
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    • 2013
  • This paper presents a capacitor loaded tunable bandpass chip filter using multiple split ring resonators (MSRRs) with two transmission zeros. To obtain high selectivity and minimize the chip size, asymmetric feed lines are adopted to make a pair of transmission zeros located on each side of passband. Compared with conventional filters using cross-coupling or source-load coupling techniques, the proposed filter uses only two resonators to achieve high selectivity through a pair of transmission zeros. In order to optimize selectivity and sensitivity (insertion loss) of the filter, the effect of the position of asymmetric feed line on transmission zeros and insertion loss is analyzed. The SOI-CMOS switched capacitor composed of metal-insulator-metal (MIM) capacitor and stacked-FETs is loaded at outer rings of MSRRs to tune passband frequency and handle high power signal up to +30 dBm. By turning on or off the gate of the transistors, the passband frequency can be shifted from 4GH to 5GHz. The proposed on-chip filter is implemented in 0.18-${\mu}m$ SOI CMOS technology that makes it possible to integrate high-Q passive devices and stacked-FETs. The designed filter shows miniaturized size of only $4mm{\times}2mm$ (i.e., $0.177{\lambda}g{\times}0.088{\lambda}g$), where ${\lambda}g$ denotes the guided wave length of the $50{\Omega}$ microstrip line at center frequency. The measured insertion loss (S21)is about 5.1dB and 6.9dB at 5.4GHz and 4.5GHz, respectively. The designed filter shows out-of-band rejection greater than 20dB at 500MHz offset from center frequency.