• ETRI Journal
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• v.40 no.6
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• pp.693-698
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• 2018

This paper presents a true-time delay (TTD) using a commercial $0.13-{\mu}m$ CMOS process for wideband phased-array antennas without the beam squint. The proposed TTD consists of four wideband distributed gain amplifiers (WDGAs), a 7-bit TTD circuit, and a 6-bit digital step attenuator (DSA) circuit. The T-type attenuator with a low-pass filter and the WDGAs are implemented for a low insertion loss error between the reference and time-delay states, and has a flat gain performance. The overall gain and return losses are >7 dB and >10 dB, respectively, at 2 GHz-18 GHz. The maximum time delay of 198 ps with a 1.56-ps step and the maximum attenuation of 31.5 dB with a 0.5-dB step are achieved at 2 GHz-18 GHz. The RMS time-delay and amplitude errors are <3 ps and <1 dB, respectively, at 2 GHz-18 GHz. An output P1 dB of <-0.5 dBm is achieved at 2 GHz-18 GHz. The chip size is $3.3{\times}1.6mm^2$, including pads, and the DC power consumption is 370 mW for a 3.3-V supply voltage.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.5
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• pp.2325-2331
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• 2012

Planar square-spiral antenna using a strip conductor is proposed and analyzed for RFID system in UHF band operating from 860MHz to 960MHz. By varying the length of common line, detached distance, strip line-space, strip line-width and the number of spiral turn, the optimized antenna are designed and fabricated in compact size without a matching-stub between the input port of the proposed antenna and RFID tag chip. From the optimized results, the frequency bandwidth in VSWR<2 has covered 100MHz in the RFID UHF band. The antenna gain has obtained 3.5dBi at the center frequency of 910MHz and the desired beam pattern has shown directional pattern on elevation and azimuth angle. Therefore, the proposed antenna is suitable for practical RFID applications requiring various tag chips with the specific input impedance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.9
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• pp.947-956
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• 2008

In this paper, miniaturized conically stepped COBRA is proposed. In order to prevent electrical breakdown, COBRA, which consists of hem and lens, has to get bigger if it is designed with conventional method. Because of the phase error increase, shortening the length of the antenna without changing the aperture size leads to the reduction of the antenna gain. To avoid this, the phase error at the aperture is compensated by transforming the COBRA lens into conically stepped form. The simulations result shows that the proposed antenna has higher gain than the conventional COBRA in spite of the size reduction from 1,300 mm to 600 mm. The fabricated and measured COBRA has the gain of 26.2 dBi.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.2
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• pp.61-70
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• 1984

This paper examines the array antenna theory, basic relations between the array size (aperture) and its beamwidth and resultant patterns. This paper also provides array antenna system design criteria, mainly maximizing the signal-to-noise ratio (SNR) and its corresponding optimum array structure and weight functions. Explicit new expressions for array performance are also illustrated in terms of the array output SNR. An example is provided for a 37-element planar array to explicitly illustrate the beam-forming and nulling operations of the array. Fundamentals of sidelobe canceller (SLC) systems have been discussed along with a derivation of new SLC equations for optimum weights.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.3
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• pp.288-300
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• 2002

In this paper, a novel method of equalization of RF transceivers is suggested for MIMO(Multiple Input Multiple Output) antenna actively studied for high speed data transmission in the recent IMT-2000 system. The core of suggestion is in equalizing the transfer characteristics of multiple transceivers using feedback and memory during the predefined calibration time. This makes it possible to weight the signals in the intermediate frequency, which is easier in the application of recently developed DoA(Direction of Arrival) algorithms. In addition, the time varying optimum cell formation according to traffic is feasible by antenna beam-forming based on the DoA information. The suggested method of equalizing multiple transceivers are successfully verified using envelope simulation. two outputs. This paper is concerned with the diagnosis of multiple crosstalk-faults in OSM. As the network size becomes larger in these days, the convent.
nal diagnosis methods based on tests and simulation be.
me inefficient, or even more impractical. We propose a simple and easily implementable alg？ithm for detection and isolation of the multiple crosstalk-faults in OSM. Specifically, we develop an algorithm for isolation of the source fault in switc.
ng elements whenever the multiple crosstalk-faults are.
etected in OSM. The proposed algorithm is illustrated by an example of 16$\times$16 OSM.

• Journal of electromagnetic engineering and science
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• v.3 no.1
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• pp.62-66
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• 2003

Novel coupled line phase shifters and its equivalent phase delay line for compact broadband phased array antennas are proposed. These phase control circuits are designed to be less complex, small size and to use a less number of active devices. The phase shifter is able to control a 120$^{\circ}$ phase shift continuously, and the phase delay line for a reference phase has a fixed 60$^{\circ}$ shifted phase. Both have the low phase error of less than $\pm$3.5$^{\circ}$ and the low gain variations of less than 1 ㏈ within the 300 MHz bandwidth. These proposed circuits are adequate to form the efficient beam-forming networks with compactness, broadband, less complexity, and low cost.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.913-921
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• 2007

In this paper, we propose a novel small antenna for direction finding applications. The proposed antenna employs a skirt type disk to eliminate the radiation null on the broad-side direction in the high frequency range. Additionally, the multi-section matching stub is used for impedance matching in the low frequency range, The size of the proposed antenna is reduced as a half of the 60cm dipole which has a same resonance frequency of 200MHz. The antenna maintains a donut shape radiation pattern with a broad beam width for a wide range of frequency while the 60cm dipole shows radiation nulls on the broad-side direction and the high side-lobe level from 700MHz to 1,300MHz.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.8
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• pp.2797-2820
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• 2015

In order to accommodate huge number of antennas in a limited antenna size, a large scale antenna array is expected to have a three dimensional (3D) array structure. By using the Active Antenna Systems (AAS), the weights of the antenna elements arranged vertically could be configured adaptively. Then, a degree of freedom (DOF) in the vertical plane is provided for system design. So the three-dimension MIMO (3D MIMO) could be realized to solve the actual implementation problem of the massive MIMO. However, in 3D massive MIMO systems, the pilot contamination problem studied in 2D massive MIMO systems and the inter-cell interference as well as inter-vertical sector interference in 3D MIMO systems with vertical sectorization exist simultaneously, when the number of antenna is not large enough. This paper investigates the interference management towards the above challenges in 3D massive MIMO systems. Here, vertical sectorization based on vertical beamforming is included in the concerned systems. Firstly, a cooperative joint vertical beams adjustment and pilot assignment scheme is developed to improve the channel estimation precision of the uplink with pilots being reused across the vertical sectors. Secondly, a downlink interference coordination scheme by jointly controlling weight vectors and power of vertical beams is proposed, where the estimated channel state information is used in the optimization modelling, and the performance loss induced by pilot contamination could be compensated in some degree. Simulation results show that the proposed joint optimization algorithm with controllable vertical beams' weight vectors outperforms the method combining downtilts adjustment and power allocation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.3
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• pp.425-431
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• 2015

Beamspace Multiple-Input Multiple Output(MIMO) system can transmit multiple data by using Electronically Steerable Parasitic Array Radiator(ESPAR) antenna which has single Radio Frequency(RF)-chain. Beamspace MIMO system can reduce complexity of the system and size of antenna in comparison with the conventional MIMO system because of characteristic of ESPAR antenna using the single antenna and the RF-chain. Heretofore, only the research of transmitting single-carrier has been conducted by the use of beamspace MIMO system. Therefore, in this paper, we propose beamspace MIMO system based on Orthogonal Frequency Division Multiplexing(OFDM) for transmitting the multi-carrier and analysis the performance of this system. We find a proper reactance value which has good performance because proposed system changes the performance by the reactance values of parasitic elements. and we confirm that performance of the proposed system is similar to conventional MIMO system based on OFDM.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.7
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• pp.571-575
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• 2017

This paper presents a C-band bi-directional T/R chipset in $0.13{\mu}m$ TSMC CMOS technology for phased array antenna. The T/R chipset, which is a key component of phased array antenna, consists of a 6 bit phase shifter, a 6 bit step attenuator, and three bi-directional gain amplifiers. The phase shifter is controlled up to $354^{\circ}$ with $5.625^{\circ}$ phase step for precise beam steering. The step attenuator is also controlled up to 31.5 dB with 0.5 dB attenuation step for the side lobe level rejection. The LDO(Low Drop Output) regulator for stable 1.2 V DC power and the SPI(Serial Peripheral Interface) for digital control are integrated in the chipset. The chip size is $2.5{\times}1.5mm^2$ including pads.