• 제목/요약/키워드: Annealing time

검색결과 934건 처리시간 0.026초

Simulated Annealing Algorithm의 변형을 지원하기 위한 객체지향 프레임워크 설계 (Designing an Object-Oriented Framework for the Variants of Simulated Annealing Algorithm)

  • 정영일;유제석;전진;김창욱
    • 한국경영과학회:학술대회논문집
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    • 대한산업공학회/한국경영과학회 2004년도 춘계공동학술대회 논문집
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    • pp.409-412
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    • 2004
  • Today, meta-heuristic algorithms have been much attention by researcher because they have the power of solving combinational optimization problems efficiently. As the result, many variants of a meta-heuristic algorithm (e.g., simulated annealing) have been proposed for specific application domains. However, there are few efforts to classify them into a unified software framework, which is believed to provide the users with the reusability of the software, thereby significantly reducing the development time of algorithms. In this paper, we present an object-oriented framework to be used as a general tool for efficiently developing variants of simulated annealing algorithm. The interface classes in the framework achieve the modulization of the algorithm, and the users are allowed to specialize some of the classes appropriate for solving their problems. The core of the framework is Algorithm Configuration Pattern (ACP) which facilitates creating user-specific variants flexibly. Finally, we summarize our experiences and discuss future research topics.

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Simulated Annealing 알고리듬을 이용한 SAM-X 추가전력의 최적배치 (Efficient Simulated Annealing Algorithm for Optimal Allocation of Additive SAM-X Weapon System)

  • 이상헌;백장욱
    • 산업공학
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    • 제18권4호
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    • pp.370-381
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    • 2005
  • This study is concerned with seeking the optimal allocation(disposition) for maximizing utility of consolidating old fashioned and new air defense weapon system like SAM-X(Patriot missile) and developing efficient solution algorithm based on simulated annealing(SA) algorithm. The SED(selection by effectiveness degree) procedure is implemented with an enhanced SA algorithm in which neighboring solutions could be generated only within the optimal feasible region by using a specially designed PERTURB function. Computational results conducted on the problem sets with a variety of size and parameters shows the significant efficiency of our SED algorithm over existing methods in terms of both the computation time and the solution quality.

패킷 통신 네트워크 설계를 위한 시뮬레이티드 애닐링 방법에서 초기해와 후보해 생성방법 (Generating Mechanisms of Initial and Candidate Solutions in Simulated Annealing for Packet Communication Network Design Problems)

  • 임동순;우훈식
    • 한국경영과학회지
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    • 제29권3호
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    • pp.145-155
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    • 2004
  • The design of a communication network has long been a challenging optimization problem. Since the optimal design of a network topology is a well known as a NP-complete problem, many researches have been conducted to obtain near optimal solutions in polynomial time instead of exact optimal solutions. All of these researches suggested diverse heuristic algorithms that can be applied to network design problems. Among these algorithms, a simulated annealing algorithm has been proved to guarantee a good solution for many NP-complete problems. in applying the simulated annealing algorithms to network design problems, generating mechanisms for initial solutions and candidate solutions play an important role in terms of goodness of a solution and efficiency. This study aims at analyzing these mechanisms through experiments, and then suggesting reliable mechanisms.

극저탄소 냉연강판에서 합금원소 및 어닐링조건이 미세조직에 미치는 영향 (Effects of Alloy Additions and Annealing Parameters on Microstructure in Cold-Rolled Ultra Low Carbon Steels)

  • 정우창
    • 열처리공학회지
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    • 제17권2호
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    • pp.78-86
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    • 2004
  • Effects of the annealing parameters on the formation of ferrites transformed at low temperatures were studied in cold-rolled ultra low carbon steels with niobium and/or chromium. Niobium and chromium were found to be effective in the formation of the low temperature transformation ferrites. The low temperature transformation ferrites more easily formed when both higher annealing temperature and longer annealing time, allowing substitutional alloying elements to distribute between phases, are in combination with faster cooling rate. It was found from EBSD study that the additions of niobium or chromium resulted in the increase in the numbers of high angle grain boundaries and the decrease in those of the low angle grain boundaries in the microstructures. Both granular bainitic ferrite and bainitic ferrite were characterized by the not clearly etched grain boundaries in light microscopy because of the low angle grain boundaries.

RTA 온도가 PZT 박막의 누설전류에 미치는 영향 (Effect of RTA temperature on the leakage current characteristics of PZT thin films)

  • 김현덕;여동훈;임승혁;송준태
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.709-712
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    • 2001
  • The effects of post annealing temperature by the Rapid Thermal Annealing(RTA) on the electrical properties of Pb(Zr,Ti)O$_3$(PZT) thin film were investigated. Analyses by the RTA treatments reveled that the leakage current of PZT thin films strongly depend on heating temperature and time. It was found that leakage current properties of PZT capacitor were changed by heating temperature during the RTA annealing. On Pt/Ti/Si substrates, PZT films are deposited at 350 $^{\circ}C$ by rf magnetron sputtering. The X-ray diffusion (XRD) was confirmed the formation of PZT thin film. Leakage current characteristics were improved with decreasing the post annealing temperature of PZT thin film. RTA annealed film on the 700$^{\circ}C$ shows ferroelectric and electrical properties with a remanent polarization of 12.4${\mu}$C/$\textrm{cm}^2$ coercive field of 117kV/cm, leakage current J= 6.2${\times}$10$\^$-6/ A/$\textrm{cm}^2$

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Screen printed contacts formation by rapid thermal annealing in multicrystalline silicon solar cells

  • Kim, Kyung hae;U. Gangopadhyay;Han, Chang-Soo;K. Chakrabarty;J. Yi
    • Journal of Korean Vacuum Science & Technology
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    • 제6권3호
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    • pp.120-125
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    • 2002
  • The aim of the present work is to optimized the annealing parameter in both front and back screen printed contacts realization on p-type multicrystalline silicon and with phosphorus diffused. The RTA treatments were carried out at various temperatures from 600 to 850$\^{C}$ and annealing time ranging from 3 min to 5 min in air, O$_2$and N$_2$ ambiance. The contacts parameters are obtained according to Transmission Line Model measurements. A good RTA cycle is obtained with a temperature plateau of 700$\^{C}$-750$\^{C}$ and annealing ambiance of air. Several processing parameters required for good cell efficiency are discussed with an emphasis placed on the critical role of the glass frit in the aluminum paste. A anamolus behaviour of Aluminum n-doping on p-type Si wafer, contact at high temperature have also been studied.

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Characteristic in Mg-doped p-type GaN changing activation temperature in $N_2$ gas ambient

  • Lee, Sung-Ho;Kim, Chul-Joo;Seo, Yong-Gon;Seo, Mun-Suek;Hwang, Sung-Min
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.113-114
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    • 2008
  • Conventional furnace annealing (CFA) for activating Mg-doped p-type GaN films had been performed in pure $N_2$ ambient. All sample activated the same gas ambient. The annealing process change temperature: the first process is performed at $550^{\circ}C$ for 10 min. but, the first process is the same bulk. From second to five process increase activation temperature to change $50^{\circ}C$ and annealing time keeping for 10 min. It is found that the samples characteristic measure hall measurement. Similar results were also evidenced by photoluminescence (PL) measurement.

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Characterizations of Interface-state Density between Top Silicon and Buried Oxide on Nano-SOI Substrate by using Pseudo-MOSFETs

  • Cho, Won-Ju
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제5권2호
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    • pp.83-88
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    • 2005
  • The interface-states between the top silicon layer and buried oxide layer of nano-SOI substrate were developed. Also, the effects of thermal treatment processes on the interface-state distributions were investigated for the first time by using pseudo-MOSFETs. We found that the interface-state distributions were strongly influenced by the thermal treatment processes. The interface-states were generated by the rapid thermal annealing (RTA) process. Increasing the RTA temperature over $800^{\circ}C$, the interface-state density considerably increased. Especially, a peak of interface-states distribution that contributes a hump phenomenon of subthreshold curve in the inversion mode operation of pseudo-MOSFETs was observed at the conduction band side of the energy gap, hut it was not observed in the accumulation mode operation. On the other hand, the increased interface-state density by the RTA process was effectively reduced by the relatively low temperature annealing process in a conventional thermal annealing (CTA) process.

Effect of Annealing and Co contents on the Structural and Physical Properties in AlN Thin Films

  • Han, Chang-Suk;Han, Seung-Oh
    • 열처리공학회지
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    • 제23권6호
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    • pp.331-337
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    • 2010
  • Aluminum nitride (AlN) thin films containing various amounts of Co content have been deposited by using a two-facing targets type sputtering (TFTS) system. The deposited films were also annealed successively and isothermally at different temperatures. Annealing treatment can control the physical properties as well as the microstructure of AlN films with Co particles. High magnetization and high resistivity are obtainable in AlN films containing dispersed Co particles. The coercivity of the films does not depend on annealing time, but it increases with increasing annealing temperature due to the increase of the grain size. A high saturation magnetization of 46 kG and resistivity of 2200 ${\mu}{\Omega}$-cm was obtained for AlN films containing 25 at% Co.

메로리 소자 응용을 위한 펄스 레이저 증착법으로 제작된 PLT박막의 열처리 효과 (Annealing Effect of Pb(La, Ti)$O_3$Thin Films Grown by Pulsed Laser Deposition for Memory Device Application)

  • 허창회;심경석;이상렬
    • 한국전기전자재료학회논문지
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    • 제13권9호
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    • pp.725-728
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    • 2000
  • Ferroelectric thin film capacitors with high dielectric constant are important for the application of memory devices. In this work, We have systematically investigated the variation of grain sizes depending on the process condition of two-step process. Both in-situ annealing and ex-annealing have been compared depending on the annealing time. C-V measurement, ferroelectric properties, leakage current, XRD and SEM were performed to investigate the electircal properties and microstructural properties of Pb(La, Ti)O$_3$ films.

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