• Title/Summary/Keyword: Analog integral circuit

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Built-In Self-Test of DAC using CMOS Structure (CMOS 구조를 이용한 DAC의 자체 테스트 기법에 관한 연구)

  • Cho, Sung-Chan;Kim, In-Soo;Min, Hyoung-Bok
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1862-1863
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    • 2007
  • Testing the analog/mixed-signal circuitry of a mixed-signal IC has become a difficult task. Offset error, gain error, Non-monotonic behavior, Differential Non-linearity(DNL) error, Integral Non-linearity(INL) error are important specifications used as test parameters for DAC. In this paper, we propose an efficient BIST structure for DAC testing. The proposed BIST adds the circuit which uses the capacitor and op-amp, and accomplishes a test.

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A 1V 10b 30MS/s CMOS ADC Using a Switched-RC Technique (스위치-RC 기법을 이용한 1V 10비트 30MS/s CMOS ADC)

  • Ahn, Gil-Cho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.61-70
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    • 2009
  • A 10b 30MS/s pipelined ADC operating under 1V power supply is presented. It utilizes a switched-RC based input sampling circuit and a resistive loop to reset the feedback capacitor in the multiplying digital-to-analog converter (MDAC) for the low-voltage operation. Cascaded switched-RC branches are used to achieve accurate grain of the MDAC for the first stage and separate switched-RC circuits are used in the sub-ADC to suppress the switching noise coupling to the MDAC input The measured differential and integral non-linearities of the prototype ADC fabricated in a 0.13${\mu}m$, CMOS process are less than 0.54LSB and 1.75LSB, respectively. The prototype ADC achieves 54.1dB SNDR and 70.4dB SFDR with 1V supply and 30MHz sampling frequency while consuming 17mW power.

A Study of the Adaptive Control System (適應制御裝置에 關한 硏究)

  • Ha, Joo-Shik;Choi, Kyung-Sam;Kim, Seung-Ho
    • Journal of Advanced Marine Engineering and Technology
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    • v.3 no.1
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    • pp.19-31
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    • 1979
  • Recently the adaptive control system, which keeps the control system always optimal by adjusting the control parameters automatically according to the variations of the plant parameters, have become very important in the field of control engineering. The adaptive control systems are usally composed of the plant identification, the decision of the optimal control parameters, and the adjustment of the control parameters. This paper deals with a method of the adaptive control system when PI or PID controller is used in the feed back control system. Its controlled object (the plant) is assumed to be described by the transfer function of $\frac{ke^{-LS}}{1+TS}$ where k, T and L are steady state gain, time constant and pure dead time respectively, and their values are variable in accordance with the change of environmental circumstance. It has been known that a pseudo-random binary signal is quite effective for the measurement of an impulse response of a plant. In adaptive control systems, however, the impulse response itself is not appropriate to determine the control parameters. In this paper, the authors propose a method to estimate directly the parameters of the plant k, T and L by means of the correlation technique using 3 level M-sequence signal as a test signal. The authors also propose a method to determine the optimal parameters of the PI or PID controller in the sense of minimizing the square integral of the control error in the feed back control system, and the values of the optimal parameters are computed numerically for various values of T and L, and the results are examined and compared with those of the conventional methods. Finally the above-mentioned two methods are combined and an algorithm to struct an adaptive control system is suggested. The experiments for the indicial responses by means of both the model of the temperature control system using SCR actuater and the analog simulations have shown good results as expected, and the effectiveness of the proposed method is verified. The M-sequence generator and the time delay circuit, which are manufactured for the experiments, are operated in quite a good condition.

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Design of Low Power 12Bit 80MHz CMOS D/A Converter using Pseudo-Segmentation Method (슈도-세그멘테이션 기법을 이용한 저 전력 12비트 80MHz CMOS D/A 변환기 설계)

  • Joo, Chan-Yang;Kim, Soo-Jae;Lee, Sang-Min;Kang, Jin-Ku;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.13-20
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    • 2008
  • This paper describes the design of low power 12bit Digital-to-Analog Converter(D/A Converter) using Pseudo-Segmentation method which shows the conversion rate of 80MHz and the power supply of 1.8V with 0.18um CMOS n-well 1-poly 6-metal process for advanced wireless communication system. Pseudo-segmentation method used in binary decoder consists of simple parallel buffer is employed for low power because of simpler configuration than that of thermometer decoder. Also, using deglitch circuit and swing reduced drivel reduces a switching noise. The measurement results of the proposed low power 12bit 80MHz CMOS D/A Converter shows SFDR is 66.01dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB is 10.67bit. Integral nonlinearity(INL) / Differential nonlinearity(DNL) have been measured ${\pm}1.6LSB/{\pm}1.2LSB$. Glich energy is measured $49pV{\cdot}s$. Power dissipation is 46.8mW at 80MHz(Maximum sampling frequency) at a 1.8V power supply.