• Journal of Biomedical Engineering Research
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• v.20 no.4
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• pp.495-502
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• 1999

We propose efficient speech signal processing algorithms and a system for cochlear implant in this paper. The outer and the middle car which perform amplifying, lowpass filtering and AGC, are modeled by an analog system, and the inner ear acting as a time-delayed multi filter and the transducer is implemented by the DSP circuit which enables real-time processing. Especially, the basilar membrane characteristic of the inner ear is modeled by a nonlinear filter bank, and then tonotopy and periodicity of the auditory system is satisfied by using a pitch-synchronous multi-spectra(PSMS) method. Moreover, most of the speech processing is performed by S/W so the system can be easily modified. And as our program is written in C-language, it can be easily transplanted to the system using other processors.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2167-2168
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• 2006

Mobilecomputer of offers more fundamental role than role assistance enemy of modem technology equipment and new Information Technology can reconsider, and reconstruct creatively accuracy of physiological concept. That military register symptoms are developed of disease, before far before rehalibitation, of for possibility that can intervene in process that motive change of military register symptoms after rehalibitation. But, that many parameters become analysis target and mathematical settlement and equalization system of noted data of that is huge, same time collection of all datas can lift difficulty etc.. These main weakness puts in structural relation between elements that compose system. Therefore, dynamics research that time urea of systematic adjustment has selected method code Tuesday nerve dynamics enemy who groping of approach that become analysis point is proper and do with recycling bioelectricity signal. Nature model of do living body signal digital analysis chapter as research result could be developed and scientific foundation groping could apply HSS (Hardware-software system) by rehalibitation purpose. Special quality that isdone radish form Tuesday of bioelectricity signal formation furthermore studied, and by the result, fundamental process of bodysignal in do structure circuit form of analog - digital water supply height modelling do can.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.8 s.350
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• pp.19-26
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• 2006

In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit 100MSPS at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. Further, the number of folding blocks (NFB) is decreased by half of them compared to the conventional ones. A moebius-band averaging technique is adopted at the proposed ADC to improve performance. With the clock speed of 100MSPS, the ADC achieves an effective resolution bandwidth (ERBW) of 50MHz, while consuming only 4.5mW of power. The measured result of figure-of-merit (FoM) is 0.93pJ/convstep. The INL and DNL are within ${\pm}0.5 LSB$, respectively. The active chip occupies an area of $0.28mm^2$ in 0.18um CMOS technology.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.122-133
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• 2013

An arbiter-based simple phase decision circuit (PDC) optimized for high-resolution phase-to-digital converter made up of an analog phase-frequency detector and a time-to-digital converter for all-digital phase-locked loops is proposed. It can distinguish very small phase difference between two pulses even though it consumes lower power and has smaller input-to-output delay than the previously reported PDC. Proposed PDC is realized using 130-nm CMOS process and demonstrated by transistor-level simulations. A 5-bit P2D having no offset nor deadzone using the PDC is also demonstrated. A harmonic-lock-free and small-phase-offset delay-locked loop for fixing the P2D resolution regardless of PVT variations is also proposed and demonstrated.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.143-146
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• 2011

A 50-MS/s 10-bit pipelined ADC with 1.2Vpp differential input range is proposed in this paper. The designed pipelined ADC consists of eight stage of 1.5bit/stage, one stage of 2bit/stage, digital error correction block, bias & reference driver, and clock generator. 1.5bit/stage is consists of sub-ADC, DAC and gain stage, Specially, a sample-and hold amplifier (SHA) is removed in the designed pipelined ADC to reduce the hardware and power consumption. Also, the proposed bootstrapped switch improves the Linearity of the input analog switch and the dynamic performance of the total ADC. The reference voltage was driven by using the on-chip reference driver without external reference. The proposed pipelined ADC was designed by using a 0.18um 1-poly 5-metal CMOS process with 1.8V supply. The total area including the power decoupling capacitor and power consumption are $0.95mm^2$ and 60mW, respectively. Also, the simulation result shows the ENOB of 9.3-bit at the Nyquist sampling rate.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.687-691
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• 2011

In this paper, we design an 8-bit eSuse OTP (one-time programmable) memory in consideration of EM (electro-migration) and eFuse resistance variation based on a $0.18{\mu}m$ generic process, which is used for an analog trimming application. First, we use an external program voltage to increase the program power applied an eFuse. Secondly, we apply a scheme of precharging BL to VSS prior to RWL (read word line) activation and optimize read NMOS transistors to reduce the read current flowing through a non-programmed cell. Thirdly, we design a sensing margin test circuit with a variable pull-up load out of consideration for the eFuse resistance variation of a programmed eFuse. Finally, we increase program yield of eFuse OTP memory by splitting the length of an eFuse link.

• Journal of Advanced Marine Engineering and Technology
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• v.3 no.1
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• pp.19-31
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• 1979

Recently the adaptive control system, which keeps the control system always optimal by adjusting the control parameters automatically according to the variations of the plant parameters, have become very important in the field of control engineering. The adaptive control systems are usally composed of the plant identification, the decision of the optimal control parameters, and the adjustment of the control parameters. This paper deals with a method of the adaptive control system when PI or PID controller is used in the feed back control system. Its controlled object (the plant) is assumed to be described by the transfer function of $\frac{ke^{-LS}}{1+TS}$ where k, T and L are steady state gain, time constant and pure dead time respectively, and their values are variable in accordance with the change of environmental circumstance. It has been known that a pseudo-random binary signal is quite effective for the measurement of an impulse response of a plant. In adaptive control systems, however, the impulse response itself is not appropriate to determine the control parameters. In this paper, the authors propose a method to estimate directly the parameters of the plant k, T and L by means of the correlation technique using 3 level M-sequence signal as a test signal. The authors also propose a method to determine the optimal parameters of the PI or PID controller in the sense of minimizing the square integral of the control error in the feed back control system, and the values of the optimal parameters are computed numerically for various values of T and L, and the results are examined and compared with those of the conventional methods. Finally the above-mentioned two methods are combined and an algorithm to struct an adaptive control system is suggested. The experiments for the indicial responses by means of both the model of the temperature control system using SCR actuater and the analog simulations have shown good results as expected, and the effectiveness of the proposed method is verified. The M-sequence generator and the time delay circuit, which are manufactured for the experiments, are operated in quite a good condition.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.184-193
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• 2015

This paper proposes a cost-efficient and automatic method for large data acquisition from a test chip without expensive equipment to characterize random process variation in an integrated circuit. Our method requires only a test chip, a personal computer, a cheap digital-to-analog converter, a controller and multimeters, and thus large volume measurement can be performed on an office desk at low cost. To demonstrate the proposed method, we designed a test chip with a current model logic driver and an array of 128 current mirrors that mimic the random process variation of the driver's tail current mirror. Using our method, we characterized the random process variation of the driver's voltage due to the random process variation on the driver's tail current mirror from large volume measurement data. The statistical characteristics of the driver's output voltage calculated from the measured data are compared with Monte Carlo simulation. The difference between the measured and the simulated averages and standard deviations are less than 20% showing that we can easily characterize the random process variation at low cost by using our cost-efficient automatic large data acquisition method.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.4
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• pp.161-168
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• 2018

High blood pressure is main today's adult disease and existing blood pressure gauge is not possible for real-time blood pressure measurement and remote monitoring. But real-time blood pressure monitoring u-healthcare system makes effect health management. In my paper, for monitoring real-time blood pressure, an architecture of real-time blood pressure monitoring system which consisted of wrist type-blood pressure measurement, smart-phone and u-healthcare server is presented. And the analog circuit architecture which is major core function for pulse wave detection and digital hardware architecture for wrist type-blood pressure measurement is presented. Also for software development to operate this hardware system, UML analysis method and flowcharts and screen design for this software design are showed. Therefore such design method in my paper is expected to be useful for real-time blood pressure monitoring u-healthcare system implementation.

• Journal of the Korean Institute of Intelligent Systems
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• v.22 no.5
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• pp.533-539
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• 2012

The purpose of this study is to estimate a validity of control signal through a design of Exoskeleton Robot Arm's capable of intelligent recognition as a human arm's motion by using realtime processed data of generated EMG signals. By an intelligent algorithm, the EMG output value of human biceps and triceps muscles contraction can be recognized and used for the control over exoskeleton arm corresponding to human's recognition and judgement. The EMG sensing data of muscles contraction and relaxation are used as the input signal from human's body to operate the Exoskeleton Robot Arm thus copying human arm motion. An intelligent control of Exoskeleton Robot Arm is to design the analog control circuit which processes the input data, and then to manufacture an integrated control board. And then abstracted signal is passed by DSP signal processing, Fuzzy logic algorithm is designed for a accurate prediction of weight or load through the intelligent algorithm, and design an Exoskeleton Robot Arm to express a human's intention.