• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.12 no.1
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• pp.18-26
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• 1999

In this study, the undoped amorphous layers and phosphorus doped amorphous layers are fabricated using LPCVD at 531$^{\circ}C$ with SiH$_4$ gas or at same temperature with PH$_3$ gas during deposition, respectively. The thickness of deposited amorphous layer from this experiments was 5000 ${\AA}$. In this experiments, undoped amorphous layers are deposited with SiH$_4$and Si$_2$H$\_$6/ gas in a low pressure reactor using LPCVD. These amorphous layers can be doped for poly-silicon by phosphorus ion implantation. The experiments of this study are carried out by phosphorus ion implantation with energy 40 keV into P doped and undoped amorphous silicon layers. The distribution of phosphorus profiles are measured by SIMS(Cameca 6f). Recoiling effects and two dimensional profiles are also explained by comparisions of experimental and simulated data. Finally range moments of SIMS profiles are calculated and compared with simulation results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.6
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• pp.1123-1127
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• 2009

This paper expands the scope of application of the thin film transistor (TFT) in which it is used as the switching element by making the amorphous silicon TFT with the non-volatile memory device,. It is the thing about the amorphous silicon non-volatile memory device which is suitable to an enlargement and in which this uses the additionally cheap substrate according to the amorphous silicon use. As to, the amorphous silicon TFT non-volatile memory device is comprised of the glass substrates and the gate, which evaporates on the glass substrates and in which it patterns the first insulation layer, in which it charges the gate the floating gate which evaporates on the first insulation layer and in which it patterns and the second insulation layer in which it charges the floating gate, and the active layer, in which it evaporates the amorphous silicon on the second insulation layer the source / drain layer which evaporates the n+ amorphous silicon on the active layer and in which it patterns and the source / drain layer electrode in which it evaporates on the source / drain layer.

• Journal of Biomedical Engineering Research
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• v.19 no.3
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• pp.225-232
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• 1998

Results of Monte Carlo simulations on amorphous silicon based x-ray imaging arrays are described. In order to investigate the characteristics of amorphous silicon x-ray imaging devices and to provide the optimum design parameter, Monte Carlo simulations were performed. Monte Carlo simulation codes for our purpose were developed and various combinations of x-ray peak voltages, aluminum filter thicknesses, CsI(TI) thicknesses, and amorphous silicon photodiode pixel sizes were tested in connection with detection efficiency and spatial resolution of the amorphous silicon based x-ray imager. With usual Csl(TI) thickness of 300${\mu}{\textrm}{m}$-500${\mu}{\textrm}{m}$, detection efficiency was in the range of 70%-95% and energy absorption efficiency was in the range of 40%-70% for 60kVp-120kVp x-ray. From the simulations it was found that amorphous silicon pixel size and Csl(TI) thickness were the most important parameters which determine the resolution of the imager. By use of our simulation results we could provide proper combinations of Csl(TI) thicknesses and pixels sizes for optimum sensitivity and resolution.

• Journal of the Korean Ceramic Society
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• v.35 no.5
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• pp.486-492
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• 1998

Silicon carbide (SiC) thin films were deposited on the porous silicon substrates by chemical vapour de-position(CVD) using MTS as a source material. The deposited films were ${\beta}$-SiC with poor crystallity con-firmed by XRD measurement. It was considered that the films showed the mixed characteistics of cry-stalline and amorphous SiC where amorphous SiC where amorphous SiC played a role of buffer layer in interface between as-dep films and Si substrate. The buffer layer reduced lattice mismatch to some extent the generally occurs when SiC films are deposited on Si. The low temperature (10K) PL (phtoluminescence) studies showed two broad bands with peaks at 600 and 720 for the films deposited at 1100$^{\circ}C$ The maximum PL peak of the crystalline SiC was observed at 600 nm and the amrophous SiC of 720 nm was also confirmed. PL peak due the amorphous SiC was smaller than that of the crystalline SiC, PL of porous Si might be disapperared due to densification during heat treatment.

• Journal of the Korean Solar Energy Society
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• v.39 no.1
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• pp.11-19
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• 2019

Spectroscopic ellipsometry is a powerful tool for analyzing optical properties of material. Ellipsometry measurement results is usually given by change of polarization state of probe light, so the measured result should be properly treated and transformed to meaningful parameters by transformation and modeling of the measurement result. In case of hydrogenated amorphous silicon, Tauc-Lorentz dispersion is usually used to model the measured ellipsometry spectrum. In this paper, modeling of spectroscopic ellipsometry result of hydrogenated amorphous silicon using Tauc-Lorentz dispersion is discussed.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.4
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• pp.101-104
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• 2018

An electric field was applied to a Mo conductive layer in the sandwiched structure of $glass/SiO_2/Mo/SiO_2/a-Si$ to induce Joule heating in order to generate the intense heat needed to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced via Joule heating through a solid state transformation. Blanket crystallization was accomplished within the range of millisecond, thus demonstrating the possibility of a new crystallization route for amorphous silicon films. The grain size of JIC poly-Si can be varied from few tens of nanometers to the one having the larger grain size exceeding that of excimer laser crystallized (ELC) poly-Si according to transmission electron microscopy. We report here the blanket crystallization of amorphous silicon films using the $2^{nd}$ generation glass substrate.

• Journal of Ceramic Processing Research
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• v.13 no.spc2
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• pp.336-340
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• 2012

Wide band gap p-type hydrogenated amorphous silicon oxide (a-SiO:H) buffer layer has been used at the interface of transparent conductive oxide (TCO) and hydrogenated amorphous silicon (a-Si:H) p-type layer of a p-i-n type a-Si:H solar cell. Introduction of 5 nm thick buffer layer improves in blue response of the cell along with 0.5% enhancement of photovoltaic conversion efficiency (η). The cells with buffer layer show higher open circuit voltage (Voc), fill factor (FF), short circuit current density (Jsc) and improved blue response with respect to the cell without buffer layer.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.633-636
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• 1992

The need for more efficient transformer core materials, due to increased recognition by the loss reduction of electric utilities, has spurred the development of amorphous metal usage in transformer. The loss of amorphous core is one third to one fourth that of silicon steel at equivalent inductions 15KG and below. Thus, the substitution of amorphous metal for conventional silicon steel in a transformer core can reduce core loss by 75%. This paper describes the development trend, the manufacturing processes of amorphous core transformer and the characteristics of amorphous core transformer in comparison with those of silicon core transformer.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.2
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• pp.173-179
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• 1999

The effect of the surface activation treatment on the crystallization of the amorphous silicon film was investigated. The amorphous silicon film was deposited on the silica substrate with LPCVD technique. Wet blasting with silica slurry or exposure with Nd:YAG laser beam was applied on the amorphous silicon film before annealing for the crystallization. For the analysis of the crystallinity, XRD, Raman, and SEM were employed. In this investigation, the prior surface activation treatment like silica wet blasting or Nd:YAG laser beam exposure before annealing for the crystallization were found to be effective in the enhancement of the crystallization. It is believed that these treatment lower the activation energy required for the crystallization of the amorphous silicon film.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.11
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• pp.1251-1256
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• 2015

In this paper, the processing conditions of the amorphous silicon film growth were investigated the effect in forming the HSG-Si on the surface of the storage electrode. As a result, when the amorphous silicon film phosphorus concentration is greater than $5.5{\pm}0.1E19atoms/cm^3$, HSG-Si is not formed correctly and showed the concentration dependency of HSG formation. Also, the optimum condition of the phosphorus concentration for amorphous silicon and HSG thickness are $4.5E19atoms/cm^3$ and $450{\AA}$, respectively, because of the HSG thickness over the $500{\AA}$ create to bit failure according to a short of the electrodes and the electrode.