• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.904-907
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• 2007

We reported a simplified circuit model to investigate the interface states and the quality of a-Si film based on a MIS structure using admittance spectroscopy. The model can be employed easily to monitor the fabrication process of thin-film transistor and to obtain the important parameters.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.7
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• pp.1121-1127
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• 1994

The accelerated degradation phenomena in amorphous silicon thin film transistors due to both electrical stress and visible light illumination under the elevated temperature have been investigated systematically as a function of gate bias, light intensity, and stress time. It has been found that, in case of electrical stress, the thrshold voltage shifts of a-Si:H TFT's may be attributed to the defect creation process at the early stage, while the charge trapping phenomena may be dominant when the stressing periods exceed about 2 hours. It has been also observed that the degradation in the device characteristics of a-Si:H TFT's is accelerated due to multiple stress effects, where the defect creation mechanism may be more responsible for the degradation rather than the charge trapping mechanism.

• Electrical & Electronic Materials
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• v.9 no.10
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• pp.1008-1012
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• 1996

I-V, C-V characteristics of inverted staggered type hydrogenerated amorphous silicon thin film transistor(a-Si:H TFT) was studied and experimentally verified. The results show that the log-log plot of drain current increased by voltage increase. The saturated drain current of DC output characteristics increased at a fixed gate voltage. According to the increase of gate voltage, activation energy of electron and the increasing width of Id at high voltage were decreased. Id saturation current saturated at high Vd over 4.5V, Vg-ld hysteresis characteristic curves occurred between -15V and 15V of Vg. Hysteresis current decreased at low voltage of -15V and increased at high voltage of 15V.

• Journal of the Korean Vacuum Society
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• v.5 no.1
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• pp.73-76
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• 1996

We have prepared hydrogenated amophous silicon (a-si : H) films with superlattice structure by hydrogen radical anneling(HRA) technique. We have studied the preparation of a-Si :H films by HRA and the optical & electronic characteristics. Optical band gap and the hydrogen contents in the a Si : H film is decreased as HRA time increased. We first report a -Si : H film prepared by periodicdeposition of a-Si : H layer and HRA have the superlattice structure using TEM . After 1 hour light soaking on the a-Si :H film prepared by HRA, there are no difference in the temperatre dependence of dark conductivity and the conductivity activation energy. An excellent stability for light in a-Si :H films by HRA can be explained using the long-range structural relaxation of the amorphous network and the propertiesof light -induced defects(LID) proposed by Fritzsche.

• Journal of Information Display
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• v.5 no.2
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• pp.1-5
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• 2004

We developed an a-Si TFT-LCD panel with integrated gate driver circuit using a standard 5-MASK process. To minimize the effect of the a-Si TFT current and LC's capacitance variation with temperature, we developed a new a-Si TFT circuit structure and minimized coupling capacitance by changing vertical architecture above gate driver circuit. Integration of gate driver circuit on glass substrate enables single chip and 3-side free panel structure in a-Si TFT-LCD of QVGA ($240{\times}320$) resolution. And using double ASG structure the dead space of TFT-LCD panel could be further decreased.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.7
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• pp.760-765
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• 1992

The material properties and the TFT characteristics fabricated on SiOS12T substrate by LPCVD using SiHS14T gas were investigated. The deposition rate showed Arrhenius behavior with an activation energy of 31Kcal/mol. And the transition temperature form amorphous to crystalline deposition was observed at 570$^{\circ}C$-580$^{\circ}C$. The strong(220) texture was observed as the deposition temperature increases. XRD analysis showed that the film texture of the as-deposited polycrystalline silicon does not change after annealing at 850$^{\circ}C$. The fabricated TFT's based on the as-deposited amorphous film showed superior electrical characteristics to those of the as-deposited polycrystalline films. It is considered that the different electrical characteristics result from the difference of flat band voltage(VS1FBT) due to the interface trap density between the gate oxide and the active channel.

• Current Photovoltaic Research
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• v.3 no.4
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• pp.107-111
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• 2015

Current characteristic curve of an illuminated solar cell was used to determine its reverse saturation current density ($J_0$), ideality factor (n) and resistances, by using numerical diode simulation. High efficiency amorphous silicon, heterojunction crystalline Si (HIT), plastic and organic-inorganic halide perovskite solar cell shows n=3.27 for a-Si and n=2.14 for improved HIT cell as high and low n respectively, while the perovskite and plastic cells show n=2.56 and 2.57 respectively. The $J_0$ of these cells remain within $7.1{\times}10^{-7}$ and $1.79{\times}10^{-8}A/cm^2$ for poorer HIT and improved perovskite solar cell respectively.

• Journal of information and communication convergence engineering
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• v.4 no.3
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• pp.105-107
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• 2006

Amorphous silicon is a kind of optical to electric conversion material with current or voltage type after generating a numerous free electron and hole when it is injected by light. It is very effective technology to make schottky diode by bonding thin film to use optical diode. In this paper, we have fabricated optical diode device by forming chrome silicide film through thermal processing with thin film($100{\AA}$) having optimal amorphous silicon. The optimal condition is that we make a thin film by using PECVD(Plasma Enhanced Chemical Vapor Deposition) to improve reliability and characteristics of optical diode. We have obtained high quality diode by using chrome silicide optical diode from dark current and optical current measurement compared to previous method. It makes a simple process and improves a good reliability.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.373-374
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• 2007

The amorphous silicon microbolometer array has been developed by the MEMS design and fabrication technology. Before the bolometer array for the image sensor being designed, the structure of unit cel I and 16x16 array of it was simulated, designed and fabricated. The properties of bolometer have been measured as such that the TCR and thermal time constant can be achieved -2 %/K and 1.4 msec respectively.

• Proceedings of the KIEE Conference
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• 1994.11a
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• pp.252-257
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• 1994

A non-uniform finite-difference Thin Film Transistor Simulation Program (TFTSP) has been developed for hydrogenated amorphous silicon TFTs. TFTSP was developed to remove as many of simplifying assumptions as possible and to provide flexibility in the modeling of TFTs so that different model assumptions may be analyzed and compared. In order to insure its usefulness and versatility as an analytic and design tool it is important for the code to satisfy a number of conditions. However, at the beginning stage of the program development, this paper shows that the code can compute the static terminal characteristics of a-Si:H TFTs under a wide range of bias conditions to allow for comparison of the model with experiment. Some of those comparisons include transfer characteristics and I-V characteristics. TFTSP will be refined to conveniently model the performances of TFTs of different designs and to analyze many anomalous behaviors and factors of a-Si:H TFTs.