A Study of the Acclerated Degradation Phenomena on th Amorphous Silicon Thin Film Transistors with Multiple Stress

복합 스트레스에 의한 비정질 실리콘 박막 트랜지스터에서의 가속열화 현상 연구

  • 이성규 (서울대 대학원 전기공학과) ;
  • 오창호 (서울대 대학원 전기공학과) ;
  • 김용상 (서울대 대학원 전기공학과) ;
  • 박진석 (서울대 대학원 전기공학과) ;
  • 한민구 (서울대 공대 전기공학과)
  • Published : 1994.07.01

Abstract

The accelerated degradation phenomena in amorphous silicon thin film transistors due to both electrical stress and visible light illumination under the elevated temperature have been investigated systematically as a function of gate bias, light intensity, and stress time. It has been found that, in case of electrical stress, the thrshold voltage shifts of a-Si:H TFT's may be attributed to the defect creation process at the early stage, while the charge trapping phenomena may be dominant when the stressing periods exceed about 2 hours. It has been also observed that the degradation in the device characteristics of a-Si:H TFT's is accelerated due to multiple stress effects, where the defect creation mechanism may be more responsible for the degradation rather than the charge trapping mechanism.

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