• Title/Summary/Keyword: Address time

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Modified Driving Method for Reducing Address Time During Subfield Time in AC PDP (플라즈마 디스플레이 패널에서 부화면 시간동안 기입시간을 단축시키기 위한 수정된 구동파형)

  • Cho, Byung-Gwon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.1
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    • pp.135-139
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    • 2015
  • The address discharge time lags are investigated in each subfield time in AC plasma display panel and a modified driving waveform is proposed to reduce the address discharge time lag by applying different additional scan voltage under no misfiring discharge production. The weak plasma discharge in AC PDP is generated by applying high positive-going ramp waveform to the scan electrode during the first reset period and that induce the production of the priming particle and wall charge. Because the wall charge becomes the wall voltage in a cell, the wall plus external address voltage produce the address discharge. However, as the wall charge in a cell is gradually disappeared as time passed, the address discharge time in the subfield time for 1 TV frame is lagged. In the first subfield time, the address discharge is faster produced than the other subfield time because the wall charge are much remained by the high positive-going ramp voltage during the reset period in the first subfield time. Meanwhile, from the second to last subfield, the address discharge production time is gradually delayed due to the dissipation of the wall charge in a cell. In this study, the address discharge time lags are measured in each subfield time and the total address discharge time lags are shortened by applying the different additional scan voltage during the address period in each the subfield time.

A Study on the Improvement of the Low Temperature Address Discharge Time Lag of High-Xe Content AC PDP (AC PDP의 저온에서 어드레스 방전 지연 시간 개선에 관한 연구)

  • Kim, Ji-Yong;Kim, Sun;Lee, Seok-Hyun;Lee, Jeong-Hae;Kim, Jun-Yeop
    • Proceedings of the KIEE Conference
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    • 2005.07c
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    • pp.2156-2159
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    • 2005
  • ADS(Address Display Period Separation) driving method has been considered to be the most appropriate driving technique for AC PDP. ADS driving method is composed of reset, address, sustain and erase period. Therefore, a long time should be allocated to an address period, which results in a reduction of brightness. To realize a high luminance and high picture quality, it is necessary to high speed addressing. However, address discharge time lag increases as the temperature decreases, which can cause the misfiring and low picture quality In this paper, the electric field effect and priming particle effect are investigated in order to reduce the address discharge time lag at low temperature. Address discharge time lag was reduced effectively when the priming particles are provided.

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A New Driving Method for Gray-scale Expression in an AC Plasma Display Panel (교류형 플라즈마 디스플레이 패널에서 계조표현을 위한 새로운 구동방식)

  • 김재성;황현태;서정현;이석현
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.8
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    • pp.407-414
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    • 2004
  • In this paper, a new gray scale expression method that divides the scan lines into multiple blocks is suggested. The proposed method can drive 16 sub-fields per 1 TV field in the panel with XGA ($1366{\times}768$) resolution. The on and off states of even subfields depend on the condition of odd subfields. The write address mode is used in the odd subfields, while the erase address mode is used in the even subfields. Because the ramp reset pulse is applied every 2 sub-fields, both the contrast ratio and the dynamic voltage margin are sufficiently obtained in comparison with previous AWD (Address While Display) methods. In realizing 16 subfields, shortening the scan time in the erase address period was important. The X bias voltage in the erase address period affected the minimum address voltage but did not the delay time of the address discharge. The delay time of the address discharge was affected by the address voltage and the time interval between the last sustain discharge and the scanning time. We also evaluated the dynamic false contour. New method shows an improved image quality in horizontal moving, but discontinuous lines were observed at the boundaries of each block in vertical moving

Relationship between Image Retention and Time Lag in an AC PDP

  • Do, Yun-Seon;Jang, Cheol;Choi, Kyung-Cheol
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.613-616
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    • 2007
  • Characteristics of dark image retention and address discharge time lag were investigated simultaneously. It was found that reset waveforms with low black luminance did not guarantee lower image retention. Improved address discharge time lag due to modified reset waveforms similarly did not show improved image retention. The address discharge time lag and the image retention are in a trade-off relation.

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A Study on the Topology Optimization of the fixed Address Type ATC frame Using a Real Number Coding Genetic Algorithm (실수코딩 유전자알고리즘을 이용한 고정번지식 ATC 프레임의 토폴로지 최적화에 관한 연구)

  • 허영진;임상헌;이춘만
    • Journal of the Korean Society for Precision Engineering
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    • v.21 no.9
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    • pp.174-181
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    • 2004
  • Recently, many studies have been undergoing to reduce working time in field of machine tool. There are two ways of reducing working time to reduce actual working time by heighten spindle speed and to reduce stand-by time by shortening tool exchange time. Auto tool changer belongs to latter case. Fixed address type auto tool changer can store more number of tools in small space than magazine transfer Ope and can shorten tool exchange time. This study focuses on the topology optimization to reduce the weight of the fixed address type ATC. The optimization program using a real number coding genetic algorithm is developed and is applied to the 10-bar truss optimization problem to verify the developed program. And, it is shown that the developed program gives better results than other methods. Finally, The developed program applied to optimize the fixed address type ATC.

Study on Discharge Characteristics Using $V_t$ Close-Curve Analysis in ac PDPs

  • Cho, Byung-Gwon;Tae, Heung-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1185-1188
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    • 2007
  • The address discharge characteristics by the various scan-low and common-bias voltages are investigated based on measured address discharge time lags and $V_t$ close-curve analysis. The scan-low voltages are changed under the same voltage difference between the X and Y electrodes during an address period. As the voltage difference between the scan and address electrodes is increased during an address period, the address discharge time lag is shortened but the background luminance is increased. It is found that the improved address discharge characteristics is caused by the effect of the higher external applied voltage during an address period than the accumulated wall charges during a reset period and the high background luminance can be prevented by applying an address-bias voltage during a rising-ramp period and low reset voltage.

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A Study of the Effect using Ramp Waveform on the Address Period of Address Display Separated Operating in ac Plasma Display Panel (AC-PDP의 ADS 구동방식에서 어드레스 구간에 기울기파를 사용한 효과에 관한 연구)

  • Joung, Bong-Kyu;Kim, Ji-Sun;Kwon, Shi-Ok;Hwang, Ho-Jung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.2
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    • pp.180-186
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    • 2005
  • As a driving method of AC-PDP, Address-Display Separated(ADS) driving has been widely adopted for its simple architecture and low discharge failure rate. However, a high definition like a HDTV has defect of long addressing time by reason of a number of pixels. Priming effect isn't fully sustained because of long addressing time during the address period. Therefore, it has different wall charge and luminance of each addressing time in the sustain period. In this study, we suggest a new driving waveform on the address period to improve these defects. We applied a ramp waveform, instead of a square waveform, to an address period in ADS, for operating on the AC-PDP, which used the conventional gas [He-Ne-Xe]. When the ramp waveform is applied to the address period, we experimented for uniform wall charge and the improved luminance by sustained Priming effect at each addressing time in the sustain period.

A Development of Fixed Address Type Automatic Tool Change System for Machine Tool (공작기계용 고정번지식 자동 공구교환 시스템 개발)

  • 이춘만;허영진
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2003.06a
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    • pp.1150-1153
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    • 2003
  • Recently, Many studies have been undergoing to reduce a working time in a field of machine tool. There are two ways of reducing working time; to reduce actual working time by heighten spindle speed and to reduce stand-by time by shortening tool exchange time. Automatic tool change system belongs to the latter case. Fixed address type automatic tool change system that is being developed in this study can store more number of tool in small space than magazine transfer type automatic tool changer as well as shorten tool exchange time. In this paper, a simplified equivalent model of finite element method in order to analyze frame structure of fixed address type automatic tool change system is presented.

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High Speed Driving Technique in AC PDPs

  • Shin, Bhum-Jae
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1181-1184
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    • 2007
  • The new self-priming addressing driving scheme was proposed to improve an address discharge time lag. It utilizes the priming effect maintaining the priming ramp discharge during an address period and the address discharge time lag is significantly improved. In this study, the basic characteristics of the priming ramp discharge are presented.

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New Driving Method for Fast Addressing of AC-Plasma Display Panel

  • Kim, Gun-Su;Choi, Hoon-Young;Lee, Seok-Hyun;Seo, Jeong-Hyun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.726-729
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    • 2003
  • A new driving method is proposed to reduce the address period. The scan time of new driving method overlaps with the next scan time during the discharge lag time. Thus, without reducing the address pulse width and the scan pulse width, the new addressing method can reduce the address period. The results show that the scan time of about 100ns ${\sim}$ 300ns can be overlapped without the misfiring,.

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