• Journal of the Microelectronics and Packaging Society
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• v.28 no.3
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• pp.1-7
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• 2021

In this paper, by embedding a bare-die chip-type drive amplifier into the PCB composed of ABF and FR-4, it implements an embedded active device that can be applied in 28 GHz band modules. The ABF has a dielectric constant of 3.2 and a dielectric loss of 0.016. The FR-4 where the drive amplifier is embedded has a dielectric constant of 3.5 and a dielectric loss of 0.02. The proposed embedded module is processed into two structures, and S-parameter properties are confirmed with measurements. The two process structures are an embedding structure of face-up and an embedding structure of face-down. The fabricated module is measured on a designed test board using Taconic's TLY-5A(dielectric constant : 2.17, dielectric loss : 0.0002). The PCB which embedded into the face-down expected better gain performance due to shorter interconnection-line from the RF pad of the Bear-die chip to the pattern of formed layer. But it is verified that the ground at the bottom of the bear-die chip is grounded Through via, resulting in an oscillation. On the other hand, the face-up structure has a stable gain characteristic of more than 10 dB from 25 GHz to 30 GHz, with a gain of 12.32 dB at the center frequency of 28 GHz. The output characteristics of module embedded into the face-up structure are measured using signal generator and spectrum analyzer. When the input power (P_in) of the signal generator was applied from -10 dBm to 20 dBm, the gain compression point (P_1dB) of the embedded module was 20.38 dB. Ultimately, the bare-die chip used in this paper was verified through measurement that the oscillation is improved according to the grounding methods when embedding in a PCB. Thus, the module embedded into the face-up structure will be able to be properly used for communication modules in millimeter wave bands.

• Journal of electromagnetic engineering and science
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• v.14 no.3
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• pp.284-292
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• 2014

This paper presents a characteristic evaluation of commercial gallium nitride (GaN) transistors having two different gate-lengths of $0.4-{\mu}m$ and $0.25-{\mu}m$ in the design of a class-S power amplifier (PA). Class-S PA is operated by a random pulse-width input signal from band-pass delta-sigma modulation and has to deal with harmonics that consider quantization noise. Although a transistor having a short gate-length has an advantage of efficient operation at higher frequency for harmonics of the pulse signal, several problems can arise, such as the cost and export license of a $0.25-{\mu}m$ transistor. The possibility of using a $0.4-{\mu}m$ transistor on a class-S PA at 955 MHz is evaluated by comparing the frequency characteristics of GaN transistors having two different gate-lengths and extracting the intrinsic parameters as a shape of the simplified switch-based model. In addition, the effectiveness of the switch model is evaluated by currentmode class-D (CMCD) simulation. Finally, device characteristics are compared in terms of current-mode class-S PA. The analyses of the CMCD PA reveal that although the efficiency of $0.4-{\mu}m$ transistor decreases more as the operating frequency increases from 955 MHz to 3,500 MHz due to the efficiency limitation at the higher frequency region, it shows similar power and efficiency of 41.6 dBm and 49%, respectively, at 955 MHz when compared to the $0.25-{\mu}m$ transistor.

• Journal of Electrical Engineering and Technology
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• v.1 no.3
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• pp.396-405
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• 2006

The visual analysis of buried channel (Be) devices such as buried channel MOSFETs and CCDs (Charge Coupled Devices) is investigated to give better understanding and insight for their electrical behaviours using a 3-dimensional (3-D) numerical simulation. This paper clearly demonstrates the capability of the numerical simulation of 'EVEREST' for characterising the analysis of a depletion mode MOSFET and BC CCD, which is a simulation software package of the semiconductor device. The inverse threshold and punch-through voltages obtained from the simulations showed an excellent agreement with those from the measurement involving errors of within approximately 1.8% and 6%, respectively, leading to the channel implanted doping profile of only approximately $4{\sim}5%$ error. For simulation of a buried channel CCD an advanced adaptive discretising technique was used to provide more accurate analysis for the potential barrier height between two channels and depletion depth of a deep depletion CCD, thereby reducing the CPU running time and computer storage requirements. The simulated result for the depletion depth also showed good agreement with the measurement. Thus, the results obtained from this simulation can be employed as the input data of a circuit simulator.

• Journal of the Korea Computer Graphics Society
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• v.21 no.2
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• pp.11-20
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• 2015

We present a new interactive technique for directing the motion sequences of an animated character by dragging its specific body part to a desired location in the three-dimensional virtual environment via a hand motion tracking device. The motion sequences of our character is synthesized by reordering subsequences of captured motion data based on a well-known graph representation. For each new input location, our system samples the space of possible future states by unrolling the graph into a spatial search tree, and retrieves one of the states at which the dragged body part of the character gets closer to the input location. We minimize the difference between each pair of successively retrieved states, so that the user is able to anticipate which states will be found by varying the input location, and resultantly, to quickly reach the desired states. The usefulness of our method is demonstrated through experiments with breakdance, boxing, and basketball motion data.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.341-344
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• 2001

본 논문은 두 대의 카메라로 제안하는 물체의 색상, 움직임, 형태상의 특성을 이용하여 3차원 공간상의 움직임을 실시간으로 추출하는 것을 목적으로 한다. 본 논문에서 제안하는 물체는 구조상 물체 자체가 캘리브레이션 물체의 역할을 포함하여 캘리브레이션이 되지 않은 상황에서도 정확하게 물체의 3차원 정보를 추출할 수 있으므로 3차원 입력 디바이스로 이용할 수 있다. 3차원 움직임을 추출하기 위해 먼저 3차원 공간상의 물체와 좌우 영상의 상관관계를 구하고 좌우 즉 영상에서 원이 위치할 탐색영역은 MAWUPC 알고리즘을 이용하여 예측한다. 탐색영역 안에서 PCA를 사용하여 원의 정확한 위치를 찾으며 좌우 영상에서 얻은 원의 위치와 스테레오 카메라의 기하학적 구조를 종합하여 3차원 움직임을 추출한다. 추출한 3차원 움직임은 가상환경에서 가상 물체의 움직임을 제어하는데 응용할 수 있다.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.1
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• pp.8-14
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• 1999

The active devices used at microwave frequency have the different phase shift according to input power. Especially, The difference of the phase shift is large in the saturation region of the amplifier. In this paper, we disigned the phase control system for fixing the different phase shift at device. With the high frequency nonlinear amplifier, we fabricated such system that the phase shift to be fixed automatically using the varible phase shifter. The variable phase shifter fixed total phase variation of the circuit using the information that was obtained from the comparison of imputsignal phase with output signal phase. Even though the input signal is 2-tone or FM type, we could estimate and also fix the phase variation on DUT Dynamic range is about 10dB. It has been experimented at 1960MHz using Teflon (H=31mil, ${\varepsilon}r$=3.2)

• Journal of Advanced Navigation Technology
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• v.6 no.3
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• pp.188-194
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• 2002

DBS is utilized as very useful media in information-oriented society because it covers wide service area and provide high quality services. But DBS needs skill that can receive DBS signal at move. In this paper, it is considered a development of a device to receive DBS and design of a low noise downconverter that use tracking antenna to receive DBS at mobiles unit and ships which navigate in Korea peninsula coast. The structure of dual phase LNB is composed of LNA, BPF, oscillator, mixer, and IF amplifier. And for the position tracking, two input-output phase performed in phase. Measured results showed good performance that with respect to input signal 11.7 GHz~12.2 GHz, noise figure is 0.87 dBmax and conversion gain 62 dB, temperature characterization ${\pm}400$ kHz in respect to - 30 to $60^{\circ}C$, and phase noise -101 dBc/Hz in respect to offset 100 kHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.91-97
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• 2013

In this paper, a current steering 10-bit CMOS D/A converter to drive a NTSC/PAL analog TV is proposed. The proposed D/A converter has a 50MS/s operating speed with a 6+4 segmented type. Further, in order to minimize the device mismatch, a self-calibration bias technique with a fully integrated termination resistance is discussed. The chip has been fabricated with a 3.3V 0.11um 1-poly 6-metal CMOS technology. The effective chip area is $0.35mm^2$ and power consumption is about 88mW. The experimental result of SFDR is 63.1dB, when the input frequency is 1MHz at the 50MHz of sampling frequency.

• Journal of Broadcast Engineering
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• v.15 no.4
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• pp.540-546
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• 2010

Since the stereoscopic 3-dimensional (3D) video that provides users with a realistic multimedia service requires twice as much data as 2-dimensional (2D) video, it is difficult to construct the fast system. In this paper, we propose a fast stereoscopic 3D broadcasting system based on the depth information. Before the transmission, we encode the input 2D+depth video using x264, an open source H.264/AVC fast encoder to reduce the size of the data. At the receiver, we decode the transmitted bitstream in real time using a compute unified device architecture (CUDA) video decoder API on NVIDIA graphics processing unit (GPU). Then, we apply a fast view synthesis method that generates the virtual view using GPU. The proposed system can display the output video in both 2DTV and 3DTV. From the experiment, we verified that the proposed system can service the stereoscopic 3D contents in 24 frames per second at most.

• Journal of electromagnetic engineering and science
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• v.8 no.3
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• pp.129-133
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• 2008

An integrated passive device(IPD) technology by semi-insulating(SI)-GaAs-based fabrication has been developed to meet the ever increasing needs of size and cost reduction in wireless applications. This technology includes reliable NiCr thin film resistor, thick plated Cu/Au metal process to reduce resistive loss, high breakdown voltage metal-insulator-metal(MIM) capacitor due to a thinner dielectric thickness, lowest parasitic effect by multi air-bridged metal layers, air-bridges for inductor underpass and capacitor pick-up, and low chip cost by only 6 process layers. This paper presents the Wilkinson power divider with excellent performance for digital cellular system(DCS). The insertion loss of this power divider is - 0.43 dB and the port isolation greater than - 22 dB over the entire band. Return loss in input and output ports are - 23.4 dB and - 25.4 dB, respectively. The Wilkinson power divider based on SI-GaAs substrates is designed within die size of $1.42\;mm^2$.