• Title/Summary/Keyword: 3-level inverters

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A New Switching Method for 3-level GTO Inverter Considering DC-link Voltage Balancing and Minimum on/off time (DC-링크 전압균형과 최소 온-오프 시간을 고려한 새로운 3-레벨 GTO 인버터 제어기법)

  • Lee, Yo-Han;Hyun, Dong-Seok
    • Proceedings of the KIEE Conference
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    • 1994.07a
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    • pp.373-375
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    • 1994
  • In realizing a three-level GTO inverter, we should keep the voltage balancing of DC-link capacitors and consider minimum on/off time of GTO thyristors in order to make the same blocking voltage across each device and to minimize the harmonic components of the output voltage and current. In this raper, a new PWM scheme based on space voltage vectors, by which it is possible to keep neutral-point voltage and avoid narrow pulse, is presented. Experimental results verify that the proposed PWM control scheme is suitable fur hish power and high voltage three-level GTO inverters applied to induction motor drives.

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Neutral-point Potential Balancing Method for Switched-Inductor Z-Source Three-level Inverter

  • Wang, Xiaogang;Zhang, Jie
    • Journal of Electrical Engineering and Technology
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    • v.12 no.3
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    • pp.1203-1210
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    • 2017
  • Switched-inductor (SL) Z-source three-level inverter is a novel high power topology. The SL based impedance network can boost the input dc voltage to a higher value than the single LC impedance network. However, as all the neutral-point-clamped (NPC) inverters, the SL Z-source three-level inverter has to balance the neutral-point (NP) potential too. The principle of the inverter is introduced and then the effects of NP potential unbalance are analyzed. A NP balancing method is proposed. Other than the methods for conventional NPC inverter without Z-source impedance network, the upper and lower shoot-through durations are corrected by the feedforward compensation factors. With the proposed method, the NP potential is balanced and the voltage boosting ability of the Z-source network is not affected obviously. Simulations are conducted to verify the proposed method.

Output Filler Design for Noise Reduction of Induction Motor Drive System using H-Bridge 7-Level Inverters (H-Bridge 7레벨 인버터를 이용한 유도전동기 구동시스템의 노이즈 저감을 위한 출력 필터설계)

  • Kim, Soo-Hong;Ahn, Young-Oh;Kim, Yoon-Ho;Bang, Sang-Seok;Kim, Kwang-Seob
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.3
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    • pp.36-44
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    • 2006
  • In general, the generated harmonics and noise of the PWM inverter are affected by PWM switching method, switching frequency, dv/dt and di/dt. Since multilevel inverters are often applied to the high power system, and operates with low switching frequency, theyproduce large size of harmonic contents and noise. Thus it is necessary to install output filters in the multilevel inverter. In this paper a filter design approach for the harmonic and noise reduction the three phase induction motor driving system using H-bridge 7-level inverter system is presented. The passive filter that has low cost and simple structure and can effectively reduce harmonics and noise, is designed and applied to the three phase induction motor drive having multilevel inverter system. The designed system is implemented and verified by simulation and experiments.

A Method to Compensate the Distorted Space Vectors in the Unbalanced Neutral Point Voltage of 3-level NPC PWM Inverters

  • Hyun, Seung-Wook;Hong, Seok-Jin;Lee, Jung-Hyo;Lee, Chun-Bok;Won, Chung-Yuen
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.455-463
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    • 2016
  • This paper proposes a compensation method to improve the distorted space vectors when a 3-level Neutral Point Clamped (NPC) inverter has an unbalanced neutral point voltage. Since both the neutral point voltage of the DC link and the space vector of a 3-level NPC inverter are closely related depending on the output load connecting state, a distorted space vector can occur when the neutral point voltage of a 3-level NPC inverter is unbalanced. The proposed method can improve the distorted space vectors by adjusting the injection time of the small and medium vectors and by modulating the amplitude of the carrier waveforms. In this paper, the proposed method is verified by both simulation and experimental results based on a 3-level NPC inverter.

A Hybrid Active Power Filter for Electric-Railway Systems Using Multi-Level Inverters (멀티레벨 인버터를 이용한 전기철도용 하이브리드 능동 전력필터)

  • 김윤호;김수홍;이강희
    • Journal of the Korean Society for Railway
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    • v.7 no.4
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    • pp.339-344
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    • 2004
  • This paper proposes transformerless power conversion system consisting of a single-phase diode rectifier and a shunt hybrid filter for the electric-railway system. The hybrid filter consists of a single tuned LC filter per a phase and a low-rated NPC type multi-level inverter. Compared with conventional active filters. transformers are not used. Also, LC filter works as not only a harmonic filter tuned at the 3rd harmonic frequency but also a switching-ripple filter. The rating of the active filter can be decreased by using a NPC type multi-level inverter. The simulation results confirm the validity of the system.

Reducing Overshoot Voltage of SiC MOSFET in Grid-Connected Hybrid Active NPC Inverters (계통 연계형 Hybrid Active NPC 인버터의 SiC MOSFET 오버슈트 전압 저감)

  • Lee, Deog-Ho;Kim, Ye-Ji;Kim, Seok-Min;Lee, Kyo-Beum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.6
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    • pp.459-462
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    • 2019
  • This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.

An 8-bit Data Driving Circuit Design for High-Quality Images in Active Matrix OLEDs (고화질 Active Matrix OLED 디스플레이를 위한 8비트 데이터 구동 회로 설계)

  • Jo, Young-Jik;Lee, Ju-Sang;Yu, Sang-Dae
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.632-634
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    • 2004
  • First for high-qualify images and reducing process-error and driving speed, the designed 8-bit data driving circuit consists of a constant transconductance bias circuit, D-F/Fs by shift registers using static transmission gates, 1st latch and 2nd latch by tristate inverters, level shifters, current steering segmented D/A converters by 4MSB thermometer decoder and 4LSB weighted type. Second, we designed gray amp for power saving. These data driving circuits are designed with $0.35-{\mu}m$ CMOS technologies at 3.3 V and 18 V power supplies and simulated with HSPICE.

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A Study on the PWM Controller of DC-AC Inverter using the Multiprocessor System (다중프로세서 방식을 사용한 직류-교류변환기의 펄스폭변조제어에 관한 연구)

  • 이윤종;이성백
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.12 no.5
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    • pp.505-518
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    • 1987
  • In this paper, the 2-level and 3-level types of PWM technique have been analyzed, and a multiprocessor has been designed as controller for these two types of PWM inverters. Designed multiprocessor employing a hierarchical structure of a SUPERVISORY PROCESSOR which interconnects three LOCAL PROCESSOR through a common memory technique has showed as elaborate digital control characteristic. Using this multiprocessor configuration the system could gain a great degree of freedom in change of software. Also software was simpler than a single processor configuration.

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New Double-Connected Multi-Step Inverter for High Power Motor Drive Applications (대용량 모터드라이브 적용을 위한 새로운 이중접속방식의 멀티스텝 인버터)

  • Yang, Seung-Uk;Choe, Gyu-Ha;Mok, Hyung-Soo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.11 no.3
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    • pp.209-215
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    • 2006
  • Now, in this paper, going to present you with an Idea related to a new inverter of multi-step voltage source, that Is, the double-connected 12-step inverter with an auxiliary circuit. It possibly can be 24-step inverter with 3-phase voltage source which will enable us make full application even to medium and high power-level Motor drive, UPS, STATCOM, SVC, etc. in which the PWM method could not be employed. 24-step operation can be obtained from the link between the existing 12-step inverter and the additional auxiliary circuit in which the transformer of auxiliary circuit generates ripple voltage delivered to the inverter. Through a lot of experiments and simulations, (from which the validity of this scheme is confirmed,) we came to the conclusion that the increase of the primary winding number on transformer by 2N(N=1,2,3....) leads to the 12M-step(M=2,3,4...) inverter. The validity of the proposed scheme is confirmed by the simulated and experimental results.

Deadbeat Control with a Repetitive Predictor for Three-Level Active Power Filters

  • He, Yingjie;Liu, Jinjun;Tang, Jian;Wang, Zhaoan;Zou, Yunping
    • Journal of Power Electronics
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    • v.11 no.4
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    • pp.583-590
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    • 2011
  • Three-level NPC inverters have been put into practical use for years especially in high voltage high power grids. This paper researches three-level active power filters (APFs). In this paper a mathematical model in the d-q coordinates is presented for 3-phase 3-wire NPC APFs. The deadbeat control scheme is obtained by using state equations. Canceling the delay of one sampling period and providing the predictive value of the harmonic current is a key problem of the deadbeat control. Based on this deadbeat control, the predictive output current value is obtained by the state observer. The delay of one sampling period is remedied in this digital control system by the state observer. The predictive harmonic command current value is obtained by the repetitive predictor synchronously. The repetitive predictor can achieve a better prediction of the harmonic current with the same sampling frequency, thus improving the overall performance of the system. The experiment results indicate that the steady-state accuracy and the dynamic response are both satisfying when the proposed control scheme is implemented.