• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.9 no.4
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• pp.506-514
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• 1998

The design and fabrication of X-band(11.7~12 GHz) 2-stage monolithic microwave integrated circuit(MMIC) low noise amplifier (LNA) for active antenna are presented using $0.15{\mu}m\times140{\mu}m$ AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (P-HEMT). In each stage of the LNA, a series feedback by using a source inductor is used for both input matching and good stability. The measurement results are achieved as an input return loss under -17 dB, an output return loss under -15dB, a noise figure of 1.3dB, and a gain of 17 dB at X-band. This results almost concur with a design results except noise figure(NF). The chip size of the MMIC LNA is $1.43\times1.27$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.10
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• pp.2045-2051
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• 2009

A 5-GHz band Low Noise Amplifier(LNA) using SOI MOSFET is designed. To improve the noise performance, depletion-type SOI MOSFET is adopted, and it is designed by the two-stage topology consisting of common-source and common-gate stages for low-voltage operation. The fabricated LNA achieved an S11 of less than -10dB, voltage gain of 21dB with a power consumption of 8.3mW at 5.5GHz, and a noise figure of 1.7dB indicated that the depletion-type LNA improved the noise figure by 0.3dB compared with conventional type. These results show the feasibility of a CMOS LNA employing depletion-type SOI MOSFET for low-noise application.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.100-108
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• 2014

Low noise amplifier (LNA) is an integral component of RF receiver and frequently required to operate at wide frequency bands for various wireless system applications. For wideband operation, important performance metrics such as voltage gain, return loss, noise figure and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high impedance-matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that input impedance can be described in the form of second-order frequency response, where poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor located between the gate and the drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this wideband LNA is $0.202mm^2$, including pads. Measurement results illustrate that the input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 6-8 dB over 1.5 - 13 GHz. In addition, good linearity (IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.9
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• pp.13-20
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• 1999

A 2-stage MMIC(monolithic Microwave Integrated Circuits) LNA(Low Noise Amplifiers) at 30GHz hand has been designed and fabricated for the Ka-band Satellite Communications. The $0.15 {\mu}m$ with the width of $80 {\mu}m$ pHEMT technology was used for the fabrication of this MMIC LNA. Using the series feedback technique, ultra low noise and excellent S11 could be obtained at the same time without the cost of gain at 30GHz-band. The stability factors(Ks) for each stage and overall stage are greater than 1 at full frequency bands by the bias circuits and stabilization circuit. The measured performances, which agree well with the predicted performances, show this 2-stage MMIC LNA has the gain of more than 15.7dB and noise figure of less than 2.09dB over 29GHz to 33GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.5
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• pp.872-882
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• 1994

In this paper, the Low Noise Amplifier(LNA) is designed and fabricated to include a band pass filter characteristics considering the antenna system characteristics according to the transmitting and receiving signal level of communication satellite transponder. As an example, a 2-stage low noise amplifier and a 4-stage amplifier and designed, fabricated and measured at 14,0~14.5GHz of receiving frequency band. This fabricated LNA has shown the gain with very good flatness within pass-band, and its gain decreases rapidly out of band resulting in supperssion of the transmitting signal power leakage. It has shown the 20.3dB +- 0.1dB of pass-band gain, the 1.44dB +-0.04dB of noise figure and the 14dB rejection out of band(12.25~12.75GHz). The gain flatness, noise figure and group delay of this 2-stage LNA satisfactorily met the simulation results. And the fabricated 4-stage amplifier has shown the more than 42dB of pass-band gain, the +-0.25dB of flatness and the 28dB of the rejection effect for transmitting power leakage. The 2-stage LNA and 4-stage amplifier, in this paper, will bring a design margin for the input filter and also result in the system cost reduction.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.423-426
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• 2007

An active Balun is designed for RFID reader at 2.45GHz. The Balun is integrated inside the receiver, then the LNA and mixer can be connected. The unbalanced LNA output signal is transformed to a balanced signal at the input mixer The RF mixer and LO mixer, by using this balun. The Balun provided a balanced signal with two output stage, gain mismatch is 0.116dB. The phase show a good behavior with $163.918^{\circ}$,$-16.609^{\circ}$. The phase mismatch is about $0.527^{\circ}$. The tight difference between the gain and phase on each brancd, is because of the used capacitor and integrated inductor and the other parasitic element inside the balun.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.11-15
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• 2002

3 V, 2.46GHz Low Noise Amplifier (LNA) have been designed for standard 0.35$\mu\textrm{m}$ CMOS process with one poly and four metal layers. This design includes on-chip biasing, matching network and multilayer spiral inductors. The single-ended amplifier provides a forward gain of 20.5dB with a noise figure 3.35dB, and an IIP3 of -6dBm while drawing 59mW total Power consumption

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1055-1063
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• 2013

Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.3
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• pp.353-358
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• 1998

This paper presents development of a LNA operating at 1.71 ∼ 1.18 GHz used for a receiver of KOREA PCS base station and transponder. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA and suitable for input stage matching. The LNA consists of low noise GaAs FET ATF-10136 and internally matched VNA-25. The LNA is fabricated with both the RF circuit and the self-bias circuits in aluminum housing. As a result, the characteristics of the LNA implemented here shows 30 dB in gain and 0.85 dB in noise figure.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.4
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• pp.409-412
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• 2002

The LNA(Low Noise Amplifier) is designed for use in low cost commercial application covered fully IMT-2000 band(1920~2170MHz, BW=250MHz). It is optimized source inductance for source lead and designed to equivalent etched line. The LNA uses a high pass impedance matching network for noise match and simple structure. The bias circuit designs have been made self-biased with a negative voltage applied to gate. The power supply voltage is 8V, total current is 180mA. The LNA is biased at a Vgs of -0.4, Vds of 4V for first stage and Vds of 5V for second stage. The LNA is designed competitively for commercial product specification. The measured gain and noise figure of the completed amplifier was 20dB and 1dB, respectively. Also, input VSWR, P1dB and gain flatness was measured of 1.14 ~ l.3dB, 22.4dBm and $\pm$0.45dB, respectively. The designed LNA can be used for commercial product.