• Title/Summary/Keyword: 화학적 기계 연마

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The Effect of Pad Groove Density on CMP Characteristics (패드 그루브의 밀도변화가 연마특성에 미치는 영향)

  • Park Kihyun;Jung Jaewoo;Lee Hyunseop;Seo Heondeok;Jeong Seokhun;Lee Sangjik;Jeong Haedo
    • Journal of the Korean Society for Precision Engineering
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    • v.22 no.8 s.173
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    • pp.27-33
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    • 2005
  • Polishing pads play an important role in chemical mechanical polishing(CMP) which has recently been recognized at the most effective method to achieve global planarization. In this paper, we have investigated CMP characteristics as a change of groove density of polishing pads. The parameter $(K_n)$ is proposed to estimate groove density of pad. The $K_n$ is defined as groove area divided by pitch area. As the groove density value increased, removal rate increased to some point and then gradually saturated in case of increasing the groove density excessively. In addition Within wafer non-uniformity(WIWNU) worse as groove density increased excessively, although WIWNU improved as groove density increased. Also the uniformity of temperature of pad surface decreased as the groove density increased. It was because that the cooling effect increased as groove density increased. In other words, increasing the groove density which means the apparent contact area of pad has influence on amount of discharge of slurry during polishing process.

Electrical Properties of Fabrication PZT Capacitors by Chemical Mechanical Polishing Process (화학적 기계적 연마 공정으로 제조한 PZT 캐패시터의 전기적 특성)

  • Ko, Pil-Ju;Kim, Nam-Hoon;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.370-371
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    • 2006
  • 본 연구에서는 PZT박막의 강 유전 캐패시터 제작을 위한 연구로, 4-inch크기의 $SiO_2$/Pt/Ti/Si가 증착된 웨이퍼를 습식 식각하여 $SiO_2$ 패턴(0.8um)을 형성하였고, PZT박막의 캐패시터 제작을 위해 패턴 웨이퍼에 $Pb_{1.1}$($Zr_{0.52}Ti_{0.48}$)$O_3$조성을 갖는 PZT를 증착하였다. $600^{\circ}C$에서 열처리 후 페로브스카이트 구조를 가지는 PZT 박막의 CMP(chemical mechanical polishing) 공정에 따른 전기적 특성을 연구하였다. 강유전체 소자 적용을 위한 CMP 공정으로 제조된 PZT 박막 캐패시터의 P-E특성, I-V특성, 피로특성 등의 전기적 특성을 측정하였다.

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Chemical Mechanical Polishing of Aluminum Thin Films (알루미늄 박막의 화학기계적연마 가공에 관한 연구)

  • Cho, Woong;Ahn, Yoo-Min;Baek, Chang-Wook;Kim, Yong-Kweon
    • Journal of the Korean Society for Precision Engineering
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    • v.19 no.2
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    • pp.49-57
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    • 2002
  • The effect of mechanical parameters on chemical mechanical polishing (CMP) of blanket and patterned aluminum thin films are investigated. CMP process experiments are conducted using the soft pad and the slurry mainly composed of acid solution and A1$_2$O$_3$ abrasive. The result for the blanket film showed that as the concentration of abrasive in slurry is increased, the surface roughness gets worse but the waviness gets better. The planarity of the patterned Al films is slowly improved by CMP when the width of and gap between the patterns are relatively small. It is tried to find the optimized CMP process conditions by that the patterned Al thin film can be planarized with fine surface. The most satisfiable film surface is obtained when the applied pressure is low (10kPa) and the abrasive concentration is relatively high (5wt%).

A Study on the Effect of Pattern Density and it`s Modeling for ILD CMP (패턴 웨이퍼의 화학기계적 연마시 패턴 밀도의 영향과 모델링에 관한 연구)

  • Hong, Gi-Sik;Kim, Hyung-Jae;Jeong, Hae-Do
    • Journal of the Korean Society for Precision Engineering
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    • v.19 no.1
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    • pp.196-203
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    • 2002
  • Generally, non-uniformity and removal rate are important factors on measurements of both wafer and die scale. In this study, we verify the effects of the pressure and relative velocity on the results of the chemical mechanical polishing and the effect of pattern density on inter layer dielectric chemical mechanical polishing of patterned wafer. We suggest an appropriate modeling equation, transformed from Preston\`s equations which was used in glass polishing, and simulate the removal rate of patterned wafer in chemical mechanical polishing. Results indicate that the pressure and relative velocity are dominant factors for the chemical mechanical polishing and pattern density effects on removal rate of pattern wafers in die scale. The modeling is well agreed to middle and low density structures of the die. Actually, the die used in Fab. was designed to have an appropriate density, therefore the modeling will be suitable for estimating the results of ILD CMP.

Study on Characteristics of EP-MAP Hybrid Machining by Optimization of Magnetic Flux Density (자기력 최적화에 따른 전해-자기 복합가공의 특성 평가에 관한 연구)

  • Park, Chang Geun;Kwak, Jae Seob
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.37 no.3
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    • pp.319-324
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    • 2013
  • In this study, an EP (electro-polishing)-MAP (magnetic abrasive polishing) hybrid process was developed as a precision finishing process. To evaluate the characteristics of this EP-MAP hybrid process, a series of experiments were carried out using various working gaps, current densities, and electrolyte concentrations. As a result, $NaNO_3$ was found to be very suitable as the electrolyte of the hybrid process because there was no electrochemical reaction with the CNT-Co composite. Moreover, an increase in the magnetic flux density affected the liquidity of the electrolyte and prevented it from flowing into the CNT-Co composite powder. For that reason, the lower liquidity of the electrolyte increased the thermal energy on the surface of the workpiece.

A Study on the Electrochemical Reaction of Metal at Electrolyte (전해액에서 금속막의 전기화학적 반응 고찰)

  • Lee, Young-Kyun;Park, Sung-Woo;Han, Sang-Jun;Lee, Sung-Il;Choi, Gwon-Woo;Lee, Woo-Sun;Seo, Yong-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.88-88
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    • 2007
  • Chemical mechanical polishing (CMP) 공정은 그 어원에서 알 수 있듯이 슬러리의 화학적인 요소와 웨이퍼에 가해지는 기계적 압력에 의해 결정되는 평탄화 기술이다. 최근, 금속배선공정에서 높은 전도율과 재료의 값이 싸다는 이유로 Cu률 사용하였으나, 디바이스의 구조적 특성을 유지하기 위해 높은 압력으로 인한 새로운 다공성 막(low-k)의 파괴와, 디싱과 에로젼 현상으로 인한 문제점이 발생하게 되었다. 이러한 문제점을 해결하고자, 본 논문에서는 Cu 표면에 Passivation layer를 형성 및 제거하는 개념으로 공정시 연마제를 사용하지 않으며, 낮은 압력조건에서 공정을 수행하기 위해, 전해질의 농도 변화에 따른 선형추의전압전류법과 순환전압전류법을 사용하여 전압활성화에 의한 전기화학적 반응이 어떤 영향을 미치는지 연구하였다.

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Optimum Condition for Anodization of Aluminum Alloy in High Temperature K2HPO4 Containing Glycerol Electrolyte (고온의 K2HPO4/글리세롤 전해질에서 알루미늄 합금의 양극산화를 위한 최적 조건)

  • Lee, Jae-Won;Lee, Hyeon-Gwon;Lee, Gi-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2018.06a
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    • pp.69.1-69.1
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    • 2018
  • 산업 현장에서 자주 사용되는 알루미늄 합금은 순도가 높은 알루미늄에 비해 경제성, 기계적 성질이 우수한 장점이 있다. 하지만 이런 합금들은 물리적, 화학적 성질이 순수 알루미늄과 달라 양극산화와 같은 표면처리가 쉽지 않다. 양극산화는 표면처리 기술의 대표적인 방법 중 하나로 인위적으로 산화피막을 형성하는 기술이다. 순도가 높은 알루미늄은 산성 전해질에서의 양극산화를 통해 다공성 산화피막을 형성할 수 있으며 그 구조로 인해 내식성, 내마모성 등 기계적, 화학적인 다양한 장점이 있다. 하지만, Mg, Si, Cr과 같은 성분이 함유된 알루미늄의 경우 산성 전해질에서 산화물을 형성되지 않는다. 본 연구에서 기존의 산성 전해질에서의 양극산화 방법이 아닌$K_2HPO_4$를 함유하는 고온의 글리세롤 전해질을 사용하여 양극산화를 진행하였다. 사용한 알루미늄은 산업용으로 자주 사용되는 3000계열의 알루미늄을 사용하였으며 균일한 양극산화를 위해 샌드페이퍼를 통한 연마과정을 통해 표면을 평탄화 하였다. 이후 전기화학적 에칭 과정을 거쳐 표면에 있는 자연산화막을 제거하여 표면 분석을 용이하게 하였다. 양극산화는 10wt%의 $K_2HPO_4$/글리세롤 전해질에서 전해질의 온도와 인가 전압을 달리 하여 진행하였다. 결과 $150^{\circ}C$ 이상의 온도에서 알루미늄 합금의 양극산화를 확인할 수 있었고 $170^{\circ}C$의 온도에서 인가 전압을 20V로 하였을 때 가장 정렬된 다공성 구조를 얻을 수 있었다. 본 연구 결과를 통해 산업용 알루미늄 합금의 양극산화를 통해 다공성 나노구조 산화물을 형성 시킬 수 있었다.

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The Distribution of Temperature on Pad Surface During CMP Process (CMP 공정중 패드 표면의 온도분포에 관한 연구)

  • Jeong, Young-Seok;Kim, Hyoung-Jae;Jeong, Hae-Do
    • Proceedings of the KSME Conference
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    • 2003.04a
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    • pp.1283-1288
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    • 2003
  • The friction heat generated by the CMP process hasinfluence on removal rate and WIWNU(Within Wafer Non-Uniformity). Therefore, the object of this study is to find the distribution of temperature on pad surface during CMP process. To do this, the authors analyse the kinematics of CMP equipment to verify the sources of friction heat and compare the analysis result with the experimental results. Through the analysis and experiment conducted in this paper, we can predict the distribution of polishing temperature across the pad surface. Furthermore the result could help to predict the process conditions which could enhance the polishing results, such as WIWNU and removal rate of thin film to achieve more efficient process.

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A study of EPD for Shallow Trench Isolation CMP by HSS Application (HSS을 적용한 STI CMP 공정에서 EPD 특성)

  • Kim, Sang-Yong;Kim, Yong-Sik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.35-38
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    • 2000
  • In this study, the rise throughput and the stability in fabrication of device can be obtained by applying of CMP process to STI structure in 0.l8um semiconductor device. Through reverse moat pattern process, reduced moat density at high moat density, STI CMP process with low selectivity could be to fit polish uniformity between low moat density and high moat density. Because this reason, in-situ motor current end point detection method is not fit to the current EPD technology with the reverse moat pattern. But we use HSS without reverse moat pattern on STI CMP and take end point current sensing signal.[1] To analyze sensing signal and test extracted signal, we can to adjust wafer difference within $110{\AA}$.

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A study on EPD of STI CMP Process with Reverse Moat Pattern (Reverse Moat Pattern을 가진 STI CMP 공정에서 EPD 고찰)

  • Lee, Kyung-Tae;Kim, Sang-Yong;Seo, Yong-Jin;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.14-17
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    • 2000
  • The rise throughput and the stability in fabrication of device can be obtained by applying of CMP process to STI structure in 0.18um semiconductor device. To employ in STI CMP, the reverse moat process has been added thus the process became complex and the defects were seriously increased. Removal rates of each thin films in STi CMP was not equal hence the devices must to be effected, that is, the damage was occured in the device dimension in the case of excessive CMP process and the nitride film was remained on the device dimension in the case of insufficient CMP process than these defects affect the device characteristics. We studied the current sensing method in STI-CMP with the reverse moat pattern.

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