• Title/Summary/Keyword: 항복 전압

Search Result 221, Processing Time 0.033 seconds

Fabrications and Analysis of Schottky Diode of Silicon Carbide Substrate with novel Junction Electric Field Limited Ring (새로운 전계 제한테 구조를 갖는 탄화규소 기판의 쇼트키 다이오드의 제작과 특성 분석)

  • Cheong Hui-Jong;Han Dae-Hyun;Lee Yong-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.10 no.7
    • /
    • pp.1281-1286
    • /
    • 2006
  • We have used the silicon-carbide(4H-SiC) instead of conventional silicon materials to develope of the planar junction barrier schottky rectifier for ultra high breakdown voltage(1,200 V grade). The substrate size is 2 inch wafer, Its concentration is $3*10^{18}/cm^{3}$ of $n^{+}-$type, thickness of epitaxial layer $12{\mu}m$ conentration is $5*10^{15}cm^{-3}$ of n-type. The fabticated devices are junction barrier schottky rectifier, The guard ring for improvement of breakdown voltage is designed by the box-like impurity of boron, the width and space of guard ring was designed by variation. The contact metals to rectify were used by the $Ni(3,000\:{\AA})/Au(2,000\:{\AA})$. As a results, the on-state voltage is 1.26 V, on-state resistance is $45m{\Omega}/cm^{3}$, maximum value of improved reverse breakdown voltage is 1180V, reverse leakage current density is $2.26*10^{-5}A/CM^{3}$. We had improved the measureme nt results of the electrical parameters.

The Process of Anode Oxidation on $Ta_2O_5$ by Electrolyte of Ammonium Tartrate (Ammonium Tartrate를 전해질로 사용한 $Ta_2O_5$의 음극 산화 공정)

  • Hur Chang-Wu
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.10 no.6
    • /
    • pp.1088-1094
    • /
    • 2006
  • In this paper, we establish a mode oxidation process for formation of $Ta_2O_5$ insulator film. The voltage drop in the electrolyte is affected not in voltage change but in current change. If the voltage drop in the electrolyte is same with cathode oxidation voltage, the current changes logarithmically in proportion to the voltage drop in interface of Ta2O5/electrolyte. As a result of the measurement on the electrical property of $Ta_2O_5$ insulator film, when the thickness of the insulator film is $1500\AA$, the breakdown voltage is 350volts Ind dielectric constant is 29.

Fabrications and Characterization of High Temperature, High Voltage Ni/6H-SiC and Ni/4H-SiC Schottky Barrier Diodes (고온, 고전압 Ni/4H-SiC 및 Ni/6H-SiC Schottky 다이오드의 제작 및 전기적 특성 연구)

  • Lee, Ho-Seung;Lee, Sang-Wuk;Shin, Dong-Hyuk;Park, Hyun-Chang;Jung, Woong
    • Journal of the Korean Institute of Telematics and Electronics D
    • /
    • v.35D no.11
    • /
    • pp.70-77
    • /
    • 1998
  • Ni/SiC Schottky diodes have been fabricated using epitaxial 4H-SiC and 6H-SiC wafers. The epitaxial n-type layers were grown on $n^{+}$ substrates, with a doping density of 4.0$\times$10$^{16}$ c $m^{-3}$ and a thickness of 10${\mu}{\textrm}{m}$. Oxide-termination has been adopted in order to obtain high breakdown voltage and low leakage current. The fabricated Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes show excellent rectifying characteristics up to the measured temperature range of 55$0^{\circ}C$. In case of oxide-terminated Schottky barrier diodes, breakdown voltage of 973V(Ni/4H-SiC) and 920V(Ni/6H-SiC), and a very low leakage current of less than 1nA at -800V has been observed at room temperature. On non-terminated Schottky barrier diodes, breakdown voltages were 430V(Ni/4H-SiC) and 160v(Ni/6H-SiC). At room temperature, SBH(Schottky Barrier Height), ideality factor and specific on-resistance were 1.55eV, 1.3, 3.6$\times$10$^{-2}$ $\Omega$.$\textrm{cm}^2$ for Ni/4H-SiC Schottky barrier diodes, and 1.24eV, 1.2, 2.6$\times$10$^{-2}$$\Omega$.$\textrm{cm}^2$/ for Ni/SH-SiC Schottky barrier diodes, respectively. These results show that both Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes are very promising for high-temperature and high power applications.s..

  • PDF

Study of Composite channel Structure of Metamorphic HEMT for the Improved Device Characteristics (기존의 MHEMT와 InP 합성 채널 MHEMT의 소자의 항복 특성 분석 및 비교 연구)

  • Choi, Seok-Gyu;Baek, Yong-Hyun;Han, Min;Bang, Seok-Ho;Yoon, Jin-Seob;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.12
    • /
    • pp.1-6
    • /
    • 2007
  • In this study, we have performed the channel modification of the conventional MHEMT (metamorphic high electron mobility transistor) to improve the breakdown characteristics. The Modified channel consists of the InxGal-xAs channel and the InP sub channel instead of the InxGa1-xAs channel. Since InP has the lower impact ionization coefficient in comparison with In0.53Ga0.47As, we have adopted the InP-composite channel in the modified MHEMT. We have investigated the breakdown mechanism and the RF characteristics for the conventional and the InP- composite channel MHEMTs. From the measurement results, we have obtained the enhanced on and off-state breakdown voltages of 2.4 and 5.7 V, respectively. Also, the increased RF characteristics have brought about the decreased output conductance for the InP-composite channel MHEMT. The cut-off frequency (fT) and the maximum oscillation frequency (fmax) for the InP-composite Channel MHEMT were 160 GHz and 230 GHz, respectively. It has been shown that the InP-composite channel MHEMT has the potential applications for the millimeter wave power device.

The Back-Bias Effect on the Breakdown Voltage of SOI Device (Back-bias 효과에 의한 SOI소자의 항복전압 특성.)

  • Kim, Han-Soo;Choi, Yearn-Ik;Han, Min-Koo
    • Proceedings of the KIEE Conference
    • /
    • 1993.11a
    • /
    • pp.178-180
    • /
    • 1993
  • The back bias effect on the breakdown voltage of SOI $p^+$-n diode is investigated. The breakdown voltage of the SOI $p^+$-n diode increases with the applied back bias. When the cathode electrode is used as a back bias, it is necessary to put the dielectric material between the Si-substrate and the bottom cathode electrode.

  • PDF

Breakdown Voltage Improvement in SOI MOSFET Using Gate-Recessed Structure (게이트가 파인 구조를 이용한 SOI MOSFET에서의 항복전압 개선)

  • 최진혁;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.32A no.12
    • /
    • pp.159-165
    • /
    • 1995
  • A gate-recessed structure is introduced to SOI MOSFET's in order to increase the source-to-drain breakdown voltage. A significant increase in the breakdown voltage is observed compared with that of a planar single source/drain SOI MOSFET without inducing the appreciable reduction of the current drivability. We have analyzed the origin of the breakdown voltage improvement by the substrate current measurements and 2-D device simulations, and shown that the breakdown voltage improvement is caused by the reductions in the impact ionization rate and the parasitic bipolar current gain.

  • PDF

ISPSD'96 (국제 전력반도체 심포지움)에 다녀와서

  • 최연익
    • 전기의세계
    • /
    • v.45 no.7
    • /
    • pp.45-50
    • /
    • 1996
  • 이번에 대학에서 연구한 논문은 전체의 25%에 불과하며, 그나마 미국, 캐나다의 3-4개 대학에서 대부분의 논문을 발표하고 있는 형편이다. 이들 조차 기업체보다 열악한 실험 장비로 인하여, 상당히 어려움을 겪고 있고, 실리콘을 기반으로 한 소자는 거의 손을 떼고, SiC와 같이 신물질을 이용한 전력 소자에 대한 연구로 겨우 버티고 있는 실정이다. 우리나라 대학의 논문 수준은 이보다 더 낙후되어 있지만, 앞으로 더욱 열심히 노력하여 항복전압이 일어나지 않는 새로운 구조나, on-state voltage drop이 0 V인 정류기와 같은 기술적인 breakthrough를 가져올 수 있는 아이디어를 실현시킨다면, 다음 ISPSD에서는 멋지게 큰 홈런을 날릴 수 있으리라는 희망을 안고 귀국했다.

  • PDF

A Novel Schottky Diode with the Self-Aligned Guard Ring (자기정렬된 Guard Ring을 갖는 새로운 쇼트키 다이오드)

  • 차승익;조영호;최연익
    • The Transactions of the Korean Institute of Electrical Engineers
    • /
    • v.41 no.5
    • /
    • pp.573-576
    • /
    • 1992
  • Novel A1-Si Schottky diodes with self-aligned guard rings have been proposed and fabricated using RIE(Reactive Ion Etch). The breakdown voltage of the Schottky diode with the guard ring has been drastically increased to 200V or more in comparison with 46V for the metal overlap Schottky diode.

  • PDF

Reduced Cell Pitch of Vertical Power MOSFET By Forming Source on the Trench Sidewall (트렌치 측벽에 소오스를 형성하여 셀 피치를 줄인 수직형 전력 모오스 트렌지스터)

  • Park, Il-Yong
    • Proceedings of the KIEE Conference
    • /
    • 2003.07c
    • /
    • pp.1550-1552
    • /
    • 2003
  • 고밀도의 트렌치 전력 MOSFET를 제작하는 데 있어서 새로운 소자의 구조와 공정을 제시하고 이차원 소자 및 공정 시뮬레이터를 이용하여 검증했다. 트렌치 게이트 MOSFET의 온-저항을 낮추기 위해 셀 피치가 서브-마이크론으로 발전할 경우 문제가 되는 소오스 영역을 확보하고자 p-base의 음 접촉을 위한 P+ 영역과 N+ 소오스 등이 트렌치의 측벽에 형성되고, 트렌치 게이트는 그 아래에 매몰된 구조를 제안했다. 시뮬레이션 결과는 항복전압이 45 V이고, 온-저항이 12.9m${\Omega}{\cdot}mm^2$로 향상된 trade-off 특성을 보였다.

  • PDF

The Calculation Method of the Breakdown Voltage for the Drain Region with the Spherical Structure in High Voltage Analog CMOS (Spherical 구조를 갖는 고전압용 Analog CMOS의 Drain 역방향 항복전압의 계산 방법)

  • Lee, Un Gu
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.62 no.9
    • /
    • pp.1255-1259
    • /
    • 2013
  • A calculation method of the breakdown voltage for the Drain region with the spherical structure in high voltage analog CMOS is proposed. The Drain depletion region is divided into many sub-regions and the doping concentration of each sub-region is assumed to be constant. The field in each sub-region is calculated by the integration of the net charge and the breakdown voltage is calculated using the ionization integral method. The breakdown voltage calculated using the proposed method shows the maximum relative error of 3.3% compared with the result of the 2-dimensional device simulation using BANDIS.