• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.10
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• pp.17-28
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• 1999

In this paper, an ASIC emulation system called ACE (ASIC Emulator) is proposed. It can produce the prototype of target ASIC in a short time and verify the function of ASIC circuit immediately The ACE is consist of emulation software in which there are EDIF reader, library translator, technology mapper, circuit partitioner and LDF generator and emulation hardware including emulation board and logic analyzer. Technology mapping is consist of three steps such as circuit partitioning and extraction of logic function, minimization of logic function and grouping of logic function. During those procedures, the number of basic logic blocks and maximum levels are minimized by making the output to be assigned in a same block sharing product-terms and input variables as much as possible. Circuit partitioner obtain chip-level netlists satisfying some constraints on routing structure of emulation board as well as the architecture of FPGA chip. A new partitioning algorithm whose objective function is the minimization of the number of interconnections among FPGA chips and among group of FPGA chips is proposed. The routing structure of emulation board take the advantage of complete graph and partial crossbar structure in order to minimize the interconnection delay between FPGA chips regardless of circuit size. logic analyzer display the waveform of probing signal on PC monitor that is designated by user. In order to evaluate the performance of the proposed emulation system, video Quad-splitter, one of the commercial ASIC, is implemented on the emulation board. Experimental results show that it is operated in the real time of 14.3MHz and functioned perfectly.

• Journal of Digital Contents Society
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• v.15 no.4
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• pp.481-489
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• 2014

In this paper, the automatic standby power blocking socket outlet to reduce standby power by blocking power threshold is implemented. Where, the standby power means a flowing power when a disused power electronic is plugged into the socket outlet. The proposed socket outlet can cut off the standby power by establishing a proper block power threshold electronic device according to each electronic device because it can monitor the amount of power through the smart machines such as the real-time PC or mobile phone and directly control the blocking power threshold. The software is implemented by using Visual Studio software, code vision and SN8 C studio, and the hardware is embodied in ATmega128, SN8F27E93S, USB to UART, and relay etc. Through the simulation, we find that the standby power of the proposed method is similar to that of the conventional method in case of the cellular phone but the standby power of the proposed method is much less than that of the conventional method in case of the computer, air conditioning, and set-top box. Therefore, it is proved that the proposed socket outlet has a superior performance in terms of the standby power.

• Journal of Korean Society of Forest Science
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• v.89 no.3
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• pp.405-413
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• 2000

This study was conducted to develop an on-line monitoring system for a forest hydrological environment and its meteorological condition, such as temperature, wind direction and speed, rainfall and water level on V-notch, electrical conductivity(EC), potential of hydrogen(PH) by the motor drive sensor unit and measurement with a single-chip microprocessor as controller. These results are summarized as follows ; 1. The monitoring system consists of a signal process unit, motor drive sensor unit, radio modem unit and power supply. 2. The motor drive sensor unit protects the sensor from swift current or freezing and can constantly maintain fixed water level during measurements. 3. This monitoring system can transfer the data by radio modem. Additionally, this system can monitor hydrological conditions in real time. 4. The hardware was made of several modules with an independent CPU. They can be mounted, removed, repaired and added to. Their function can be changed and expanded. 5. These are the result of an accuracy test, the values of temperature, EC and pH measured within an error range of ${\pm}0.2^{\circ}C$, ${\pm}1{\mu}S$ and ${\pm}0.1pH$ respectively. 6. This monitoring system proved to be able to measure various factors for a forest hydrological environment in various experimental stations.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.48 no.3
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• pp.82-90
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• 2011

Multi-core system is becoming more general with development of microprocessors. Due to this change in performance improvement paradigm, switching conventional single thread applications with multi thread applications. Performance monitoring tools are used to optimize application performance because of complexity in development of multi thread applications. Conventional performance monitoring tools are focused on performance itself rather than user friendliness or real-time support. Real-time performance monitor identify the problem while multi-threaded applications should be performed as well as check real-time operating status of the application. So it can be used as an effective tool compared to non-real-time performance monitor that only with simple performance indicators to find the cause of the problem. In this paper, we propose RMPM(Real-time Multi-core Performance Monitor) which is real-time performance monitoring tool for multi-core system. Observation period is optimized by comparing relation between overhead due to performance evaluation period and accuracy. Our performance monitor shows not only amount of CPU usage of whole system, memory usage, network usage but also aspect of overhead distribution per thread of an application.

• Cartoon and Animation Studies
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• s.16
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• pp.223-243
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• 2009

Computer graphic where the most useful and effective production methods are used for animation or films has expanded into actors' performance beyond object expression, background expression and special effect. Unlike 2D drawing software focusing on user's sense, 3D mainly depends on hardware performance and software functions. Therefore, for 3D users, learning 3D functions is directly related to new expression, and quick learning and effective representation are keys to productivity growth in animation industry. In line with industrial needs, basic 3D animation software training is provided in school. Unfortunately, however, many problems such as lack of professional instructors, time allocation and education environment prevent various 3D animation software from being taught. Moreover, functional use does not live up to industrial rapid trends. In order to improve effects of software functional education in restricted education fields, this research aims to find out what functions of 3D animation software are used in industries, what are those function used for, and how schools provide 3D animation software training.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.7
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• pp.476-487
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• 2007

Flash memory offers attractive features, such as non-volatile, shock resistance, fast access, and low power consumption for data storage. However, it has one main drawback of requiring an erase before updating the contents. Furthermore, flash memory can only be erased limited number of times. To overcome limitations, flash memory needs a software layer called flash translation layer (FTL). The basic function of FTL is to translate the logical address from the file system like file allocation table (FAT) to the physical address in flash memory. In this paper, a new FTL algorithm called an efficient and advanced space-management technique (EAST) is proposed. EAST improves the performance by optimizing the number of log blocks, by applying the state transition, and by using reallocation blocks. The results of experiments show that EAST outperforms FAST, which is an enhanced log block scheme, particularly when the usage of flash memory is not full.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.7-14
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• 2009

Lately, NAND flash cards have been used to store massive amounts of multimedia data. However, these nand flash cells itself has a slow operation time and by that, the nand flash cards are not appropriate for high performance massive data transfer. Indeed, most flash card products have a disadvantage in that they require plenty of time to transfer massive amounts of data. Therefore, we propose a new architectural design for the hardware and software of the NAND flash cards by improving their data transfer rate. Our design is based on a multiprocessing which is different from the conventional serial processing method. We simulated our design under the VIP (Virtual IP) environment, and verified our work using FPGA test platforms. As a result, the downloading performances was approximately 160MB/s on VIP and 85.3MB/s on FPGA.

• Journal of the Korean Society for Nondestructive Testing
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• v.29 no.2
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• pp.145-152
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• 2009

Currently almost all in-service-inspection techniques, applied in domestic nuclear power plants, are partial to field inspection technique. These kinds of techniques are related to managing nuclear power plants by the operation of foreign-produced inspection devices. There have been so many needsfor development of native in-service-inspection device because there is no native diagnosis device for nuclear power plant inspection yet in Korea. In this research, we developed several core techniques to make an automated ultrasonic pipe inspection system for nuclear power plants. A high performance multi-channel ultrasonic pulser/receiver module, an A/D converter module and a digital main CPU module were developed and the performance of the developed modules was verified. The S/N ratio, noise level and signal acquisition performance of the developed modules showed proper level as we designed in the beginning.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.4
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• pp.286-290
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• 2011

LBS(Location Based System) is the essential technology of ubiquitous market and utilizes the GNSS(Global Navigation Satellite). GNSS includes GPS of USA, Galileo of Europe Union, QZSS of Japan, Compass of China, and IRNSS of India. Related researches have recently been conducted. Once the satellite is launched, the maintenance such as modification and verification of its function is difficult. Therefore, before the launch of satellites, more precise and concrete verification of performance and operations are needed. In order to do this, hardware testbed may be developed. but software simulators can provide more flexible and cost effective simulation results. These simulators should provide the essential function handling all kinds of error features experienced upon propagation of the GNSS signal. In this paper, we present a design and implementation results of a window-based simulator applying the modeling of various error features for several GNSS.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.12A
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• pp.1172-1176
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• 2008

In this paper, we describe the implementation and performance of a dual-mode Software Define Radio (SDR) smart antenna base station system. SDR technology enables a communication system to be reconfigured through software downloads to the flexible hardware platform that is implemented using programmable devices such as Digital Signal Processors (DSPs), Field Programmable Gate Arrays (FPGAs), and microprocessors. The presented base station channel card comprises the physical layer (pHY) including the baseband modem as well as the beamforming module. This channel card is designed to support TDD High-Speed Downlink Packet Access (HSDPA) as well as Wireless Broadband Portable Internet (WiBro) utilizing the SDR technology. We first describe the operations and functions required in WiBro and TDD HSDPA. Then, we explain the channel card design procedure and hardware implementation. Finally, we evaluate WiBro and TDD HSDPA performance by simulation and actual channel-card-based processing. Our smart antenna base-station dual-mode channel card shows flexibility and tremendous performance gains in terms of communication capacity and cell coverage.