• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.1
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• pp.172-178
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• 2014

This paper presents a new model of the Miller effect. The new Miller effect model is obtained from the accurate AC gain which includes the effect of the output capacitance of the common-source (CS) amplifier. The new Miller effect model consists of the series connection of a capacitance and a parallel RC circuit, one at the input and the other at the output. The frequency response obtained by the new Miller effect model is equal to that obtained from the original circuit. Even though the new model is complicated, the 3-dB frequency can be easily estimated by using the open-circuit time constants method without the node analysis.

• Journal of IKEEE
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• v.13 no.2
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• pp.194-199
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• 2009

In this study, ultra high-voltage (170kV AC), reliable 80pF mica capacitors for partial discharge system application were investigated. For capacitors design, Program was developed to sampling of series and parallel parameters. Mica was used as the dielectric of the capacitors. Using the conservative design rule, over 3 individual 50$\mu$m thick mica sheets with a size of 30mm$\times$35mm were used with lead foils to form a parallel capacitor element and 20 mica sheets were interleaved with lead foils to form a series stack of parallel capacitor element to meet the requirements of the capacitors. The dimension of the fabricated 80pF capacitor for 17kV AC were 90mm$\times$90mm. The high-frequency characteristics of the capacitance (C) and dissipation factor (D) of the developed capacitors were measured using a capacitance meter. The developed capacitor exhibited C of 79.5pF, had D of 0.001% over the frequency ranges of 150kHz to 50MHz, had a self-resonant frequency of 65MHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.37-44
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• 2009

A novel phase-locked loop(PLL) architecture with resistance and capacitance scaling scheme has been proposed. The proposed PLL has three charge pumps. The effective capacitance and resistance of the loop filter can be scaled up/down according to the locking status by controlling the direction and magnitude of each charge pump current. This architecture makes it possible to have a narrow bandwidth and low resistance in the loop filter, which improves phase noise and reference spur characteristics. It has been fabricated with a 3.3V $0.35{\mu}m$ CMOS process. The measured locking time is $25{\mu}s$ with the measured phase noise of -105.37 dBc/Hz @1MHz and the reference spur of -50dBc at 851.2MHz output frequency

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.12
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• pp.59-68
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• 1999

The timing characteristics of an ASIC are analyzed based on the propagation delays of each gate and interconnect wire. The gate delay can be modeled using the two-dimensional delay table whose index variables are the input transition time and the output load capacitance. The AWE technique can be adopted as an algorithm to compute the interconnect delay. Since these delays are affected by the interaction to the two-dimensional delay table and the AWE technique. A method to model this effect has been proposed through the effective capacitance and the gate driver model under the assumption of single driving gate. This paper presents a new technique to handle the multiple CMOS gates driving interconnect wire by extending previous approach. This technique has been implemented in C language and applied to several interconnect circuits driven by multiple CMOS gates. In most cases, we found a few tens of speed-up and only a few percents of errors in computing both of gate and interconnect delays, compared to SPICE.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.39-46
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• 2009

A fast-switching current-pulse driver for light emitting diode (LED) backlight is proposed. It uses a regulated drain current mirror (RD-CM) [1] and a high-voltage NMOS transistor (HV-NMOS). It achieves the fast-response current-pulse switching by using a dynamic gain-boosting amplifier (DGB-AMP). The DGB-AMP does not discharge the large HV-NMOS gate capacitance of the RD-CM when the output current switch turns off. Therefore, it does not need to charge the HV-NMOS gate capacitance when the switch turns on. The proposed current-pulse driver achieves the fast current switching by removing the repetitive gate discharging and charging. Simulation results were verified with measurements performed on a fabricated chip using a 5V/40V 0.5um BCD process. It reduces the switching delay to 360ns from 700ns of the conventional current-pulse driver.

• Journal of Advanced Navigation Technology
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• v.15 no.4
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• pp.596-601
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• 2011

This paper has presented research results for the switching mode class E frequency multiplier that has simple circuit structure and high efficiency. Frequency multiplication is coming from the nonlinearity of the active component, and this paper models the FET active component as a simple switch and some parasitics to analyze the characteristics. The matching component parameters for the class E frequency doubler have been derived with modeling the FET as a input controlled switch and some parasitics. A circuit simulator, ADS, is used to simulate the output voltage and current waveform and efficiency with the variation of the parasitic values. With 2.9GHz input and 2V bias, the drain efficiency has been decreased from 98% to 28% with changing the parasitic capacitance from 0pF to 1pF at 5.8GHz output, which shows that the parasitic capacitance CP has the most significant effect on the efficiency among the parasitics of FET.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.172-180
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• 2003

Based on simulation results and accompanying analysis, we suggest a thyristor-type ESD protection device structure suitable for implementation in standard CMOS processes to reduce the parasitic capacitances added to the input nodes, which is very important in CMOS RF ICs. We compare DC breakdown characteristics of the suggested device to those of a conventional NMOS protection device to show the benefits of using the suggested device for ESD protection. The characteristic improvements are demonstrated and the corresponding mechanisms are explained based on simulations. Structure dependencies are also examined to define the optimal structure. AC simulation results are introduced to estimate the magnitude of reduction in the added parasitic capacitance when using the suggested device for ESD protection. The analysis shows a possibility of reducing the added parasitic capacitance down to about 1/40 of that resulting with a conventional NMOS protection transistor, while maintaining robustness against ESD.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.4
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• pp.664-669
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• 2018

To observe the relationship between the oxygen vacancy and electrical characteristics of $TiO_2$ due to the $CO_2$ gases, the $TiO_2$ were deposited by the mixing gases of $Ar:O_2=20$ sccm:20 sccm and annealed with various temperatures. The bonding structure was changed with the annealing temperature from amorphous to crystal structure, and the oxygen vacancy was also changed with these bonding structures. The $CO_2$ gas reaction of $TiO_2$ films showed the variation in accordance with the bonding structure. The capacitance increased at the amorphous structure $TiO_2$, and the current also increased. However the oxygen vacancy decreased at this amorphous structure $TiO_2$. Because of the formation of oxygen vacancies is in inverse proportion to the amorphous structure. Moreover, the diffusion current in the depletion layer such as the amorphous structure showed the difference in accordance with the $CO_2$ gas flow rates.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.75-75
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• 2000

플라즈마 화학증착법(Plasma Enhanced Chemical Vapor Deposition, PECVD)을 이용하여 양질의 Si3N4 금속-유전막-금속(Metal-Insulator-Metal, MIM) 커페시터를 구현하였다. Fig.1에 나타낸 바와 같이 p형 실리콘 웨이퍼의 열 산화막 위에 1%의 실리콘을 함유하는 알루미늄을 스퍼터링으로 증착하여 전극을 형성하고 두 전극사이에 Si3N4 박막을 증착하여 MIM구조의 박막 커패시터를 제조하였다. Si3N4 유전막은 150Watt의 RF 출력하에서 반응 가스 N2/SiH4/NH3를 각각 300/10/80 sccm로 흘려주어 전체 압력을 1Torr로 유지하면서 40$0^{\circ}C$에서 플라즈마 화학증착법을 이용하여 증착하였으며, Al과 Si3N4 층의 계면에는 Ti과 TiN을 스퍼터링으로 증착하여 확산 장벽으로 이용하였다. 각 시편의 커패시턴스 및 바이어스 전압에 따른 누설 전류의 변화는 LCR 미터를 이용하여 측정하였고 각 시편의 커패시턴스 및 바이어스 전압에 따른 누설 전류의 변화는 LCR 미터를 이용하여 측정하였고 각 시편의 유전 특성의 차이점을 미세구조 측면에서 이해하기 이해 극판과 유전막의 단면 미세구조를 투과전자현미경(Transmission Electron Microscope, TEM)을 이용하여 분석하였다. 유전체인 Si3N4 와 전극인 Al의 계면반응을 억제시키기 위해 TiN을 확산 장벽으로 사용한 결과 MIM커패시터의 전극과 유전체 사이의 계면에서는 어떠한 hillock이나 석출물도 관찰되지 않았다. Fig.2와 같은 커패시턴스의 전류-전압 특성분석으로부터 양질의 MIM커패시터 특성을 f보이는 Si3N4 의 최소 두께는 500 이며, 그 두께 미만에서는 대부분의 커패시터가 전기적으로 단락되어 웨이퍼 수율이 낮아진다는 사실을 알 수 있었다. TEM을 이용한 단면 미세구조 관찰을 통해 Si3N4 층의 두께가 500 미만인 커패시터의 경우에 TiN과 Si3N4 의 계면에서 형성되는 슬릿형 공동(slit-like void)에 의해 커패시터의 유전특성이 파괴된다는 사실을 알게 되었으며, 이러한 슬릿형 공동은 제조 공정 중 재료에 따른 열팽창 계수와 탄성 계수 등의 차이에 의해 형성된 잔류응력 상태가 유전막을 기준으로 압축응력에서 인장 응력으로 바뀌는 분포에 기인하였다는 사실을 확인하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.8
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• pp.891-898
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• 2008

In this paper, we have studied on the possibilities of the biomaterial detection using single-walled carbon nanotube (SWNT) based on interdigital capacitors. For the four different configurations, such as interdigital capacitor, SWNT in the $5\;{\mu}m$ gap interdigital capacitor, biotinlated SWNT, and biotin and sreptavidin immobilization cases, the resonant frequency has been measured as 10.02 GHz, 11.02 GHz, 10.82 GHz, and 10.22 GHz, respectively. Assuming that the resonant frequency reflects the capacitance changes due to binding of two-different permittivity biomaterials, we have suggested an equivalent circuit model based on measured results, confirming the capacitance changes. For biotinlated SWNT and biotin-streptavidin immobilization cases, the capacitances are $C_b=0.55\;pF$ and $C_s=0.95\;pF$. In this work, we experimentally demonstrated that the specific biomaterial binding causes the capacitance change and therefore this gives rise to resonant frequency. In conclusion, we confirmed the sufficient possibility as CNT biosensor because an analyte biomaterial(streptavidin) binding arouses a considerable resonant frequency change.