• Journal of the Korean Society for Nondestructive Testing
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• v.22 no.5
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• pp.500-507
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• 2002

By this study, on-line real-time radiometric system was developed using a 64 channels linear array of solid state detectors to measure wall thickness of insulated piping system. This system uses an Ir-192 as a gamma ray source and detector is composed of BGO scintillator and photodiode. Ir-192 gamma ray source and linear detector array mounted on a computer controlled robotic crawler. The Ir-192 gamma ray source is located on one side of the piping components and the detector array on the other side. The individual detectors of the detector array measure the intensity of the gamma rays after passing through the walls and the insulation of the piping component under measurement. The output of the detector array is amplified by amplifier and transmitted to the computer through cable. This system collects and analyses the data from the detector array in real-time as the crawler travels over the piping system. The maximum measurable length of pipe is 120cm/min. in the case of 1mm scanning interval.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.3 s.40
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• pp.19-26
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• 2006

In this paper, author proposes to a fuel cell generation system used to fire prevention installation at emergency. The proposed system is used with a power source of fire prevention installation in preparation for breaking of commercial power supply at emergency. A part of most power loss of the fuel cell generation system is power converter. And the major losses of power converter are switching losses of power semiconductor switches used to power conversion. This parer is designed with a high efficiency power converter of non isolated type in order to increase efficiency of fuel cell power system. The controlling switches used in power conversion system are operated with soft switching, which is applied to partial resonant method to reduce switching loss. The result is that the fuel cell power system gets to high efficiency. Some computer simulated results and experimental results are confirmed to the validity of the analytical results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.35-40
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• 2005

A digitally controlled phase-locked loop (DCPLL) is described. The DCPLL has basically the same structure as a conventional analog PLL except for a tracking analog-to-digital converter (ADC). The tracking ADC generates the control signal for voltage controlled oscillator. Since the DCPLL employs neither digitally controlled oscillator nor time-to-digital converter-the key building blocks of digital PLL (DPLL), there is no need for the 03de-off between jitter, power consumption and silicon area. The DCPLL was implemented in a $0.18\mu$m CMOS process and the active area is 1mm $\times$0.35 mm The DCPLL consumes S9mW during the normal opuation and $984\{mu}W$ during the power-down mode from a 1.8V supply. The DCPLL shows 16.8ps ms jitter.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.78-86
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• 2003

When we transformed from Monochrome-data to Color-data in text mode, we used hardware-method to design the circuit which is convertible in real time. We saved color information in every screens that can make screen in Color Palette ROM and it is also generated 8bit. lower 4bit assign foreground color and upper 4bit can design to have background color. We have Address Reduction ROM to remove repeated address and reduce volume of Color Palette ROM to 1/16. Besides, we have many D-FF to save address, data and page information temporarily after that, we have management process 8 times through counter in real time. Finally, we chose either foreground color or background color in multiplex and established color information was sended to the color video controller. Thus, you can use it as a good interface when yow transfer many control devices with Monochrome display (ex, LCD Monitor) into devices with Color display.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.159-165
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• 2015

In this paper, we designed and tested of the passive millimeter-wave imaging system in near range. The proposed passive millimeter-wave imaging system consists two parts. The first part is a 94 GHz band millimeter imaging sensor which is coupled to an antenna, two LNAs, and a diode detector. The second part is a control unit. The control unit is consists of the 2-axes Cartesian robot, the data acquisition (DAQ), and imaging program. The 2-axes Cartesian robot should be able to scan a 2-D image of the metalic tools, IC card and plastic objects, with a raster scanning method. The passive millimeter-wave image of $20{\times}20$ pixels is acquired within less than 60s, and is immediately displayed and stored for post processing.In order to improve the image quality, interpolation methods are applied.

• Journal of IKEEE
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• v.14 no.1
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• pp.33-39
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• 2010

In this paper, a 5Gb/s receiver with an adaptive equalizer for serial link interfaces is proposed. For effective gain control, a least-mean-square (LMS) algorithm was implemented with two internal signals of slicers instead of output node of an equalizing filter. The scheme does not affect on a bandwidth of the equalizing filter. It also can be implemented without passive filter and it saves chip area and power consumption since two internal signals of slicers have a similar DC magnitude. The proposed adaptive equalizer can compensate up to 25dB and operate in various environments, which are 15m shield-twisted pair (STP) cable for DisplayPort and FR-4 traces for backplane. This work is implemented in $0.18-{\mu}m$ 1-poly 4-metal CMOS technology and occupies $200{\times}300{\mu}m^2$. Measurement results show only 6mW small power consumption and 2Gbps operating range with fabricated chip. The equalizer is expected to satisfy up to 5Gbps operating range if stable varactor(RF) is supported by foundry process.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.11
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• pp.1178-1185
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• 2009

In this paper, a wideband ultra-high speed & high purity discrete frequency synthesizer having minimum 2.5 MHz step size was proposed. To achieve fast and wideband operation, discrete frequencies were synthesized by mixing of 3 different pre-synthesized 16 frequencies made from fixed PLL and frequency dividers. Frequencies with discrete 2.5 MHz step were produced in 710~1,610 MHz. The measured hopping response time was 350 nsec average, output level was 21.5 dBm average with 2.65 dB flatness, spurious and harmonics level were suppressed below -60 dBc, and phase noise was -94 dBc/Hz@100 Hz. Also, a new measurement method for synthesizer response time was described.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.1065-1071
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• 2010

In this paper, we proposed a novel harmonic load circuit to design a high efficiency class-F amplifier. The proposed load circuit controls termination impedances to enhance the efficiency of class-F power amplifier. The termination impedances at the 2nd and the 3rd harmonics are showed short and open condition, respectively. Also, a fabricated load circuit showed an attenuation characteristic more than 29 dB, that is enough to eliminate harmonics of the class-F power amplifier. The measured drain and power-added efficiency are 75.7 % and 71.3 % at the point of maximum output power 35.17 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.4
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• pp.298-308
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• 2017

This paper presents a Interleaved Buck Converter(IBC) system with Random PWM to reduce electromagnetic noise by harmonics. Swithced mode power supply generally controlled by high switching frequency have a electromagnetic interference(EMI) issue due to the high-voltage/high-current switching to regulate the voltage in buck converter. To solve the problem. we present a novel IBC system with PRBS. IBC system has two active switches with 180 phase difference that controll the cicuit with two PWM signal. IBC system may be disadventageous for the cost due to the addtion of one set of switch, but it has adventages of power distribution, current ripple cancellation, fast transient response, and passive component size reduction. To verify the validity of study, simulation program has been bulit using PSIM and the experimental results of IBC system using RPWM was compared with the conventinal PWM and randomized PWM.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.11
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• pp.1083-1092
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• 2016

In this paper, the performance of the optical code-division multiple access (OCDMA) technology on a plastic optical fiber (POF) access network, which had received much attention due to its low weight, large core diameter, flexibility, easy installation, and especially its high bandwidth, is analyzed. Recently, POF was a very attractive candidate for transmission media in an access network based on OCDMA technology. But the conventional OCDMA system only allows finite units to transmit and access simultaneously according to the number of channels which are restricted by BER, and so, in this paper, to resolve this problem a novel multi-priority reservation protocol is also proposed. By using this reservation scheme and a distributed arbitration algorithm, channel collision and destination conflict could be avoided. And this protocol can efficiently support the transmission of multimedia messages that require the different time-delay. The network throughput and average delay using various system parameters have been investigated by numerical analysis and simulation experiments. These results shows that the multi-priority reservation protocol in this POF access network based on OCDMA technology is valid and efficient.