5-Gb/s 연속시간 적응형 등화기 설계

A 5-Gb/s Continuous-Time Adaptive Equalizer

  • Kim, Tae-Ho (School of Electronics Engineering, Inha University) ;
  • Kim, Sang-Ho (School of Electronics Engineering, Inha University) ;
  • Kang, Jin-Ku (School of Electronics Engineering, Inha University)
  • 투고 : 2010.03.08
  • 발행 : 2010.04.26

초록

본 논문에서는 5Gb/s의 직렬 링크 인터페이스에 적용 가능한 적응형 수신기를 제안한다. 효율적인 이득 제어를 위해 등화필터의 출력단 대신 슬라이서의 내부 신호를 적용한 LMS(Least Mean Square) 알고리즘을 구현하였다. 제안된 방식은 등화기의 대역폭에 영향을 미치지 않는다. 또한 비슷한 DC 크기의 신호를 가지는 슬라이서(slicer)의 내부 신호를 이용하였기 때문에 수동소자를 이용한 필터를 제거함으로써 칩 면적 및 전력소모를 줄일 수 있다. 제안된 적응형 등화기는 25dB까지 보상이 가능하며 디스플레이포트를 위한 15-m STP 케이블과 FR-4 전송선로에 적용 가능하다. 제안된 회로는 $0.18{\mu}m$ 1-폴리 4-메탈 CMOS 공정 기술이 적용하여 구현하였으며 $200{\times}300{\mu}m^2$의 칩 면적을 차지한다. 제작된 칩의 측정 결과 1.8V 공급전원에서 6mW의 매우 적은 전력소모를 나타내고 2Gbps 동작을 확인하였다. 안정된 RF용 버랙터(Varactor)를 사용하는 공정을 적용할 경우 5Gbps 동작범위를 만족할 것으로 예상된다.

In this paper, a 5Gb/s receiver with an adaptive equalizer for serial link interfaces is proposed. For effective gain control, a least-mean-square (LMS) algorithm was implemented with two internal signals of slicers instead of output node of an equalizing filter. The scheme does not affect on a bandwidth of the equalizing filter. It also can be implemented without passive filter and it saves chip area and power consumption since two internal signals of slicers have a similar DC magnitude. The proposed adaptive equalizer can compensate up to 25dB and operate in various environments, which are 15m shield-twisted pair (STP) cable for DisplayPort and FR-4 traces for backplane. This work is implemented in $0.18-{\mu}m$ 1-poly 4-metal CMOS technology and occupies $200{\times}300{\mu}m^2$. Measurement results show only 6mW small power consumption and 2Gbps operating range with fabricated chip. The equalizer is expected to satisfy up to 5Gbps operating range if stable varactor(RF) is supported by foundry process.

키워드

참고문헌

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